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From: Yi Liu <yi.l.liu@intel.com>
To: Zhenzhong Duan <zhenzhong.duan@intel.com>, <qemu-devel@nongnu.org>
Cc: <alex@shazbot.org>, <clg@redhat.com>, <eric.auger@redhat.com>,
	<mst@redhat.com>, <jasowang@redhat.com>, <jgg@nvidia.com>,
	<nicolinc@nvidia.com>, <skolothumtho@nvidia.com>,
	<joao.m.martins@oracle.com>, <clement.mathieu--drif@eviden.com>,
	<kevin.tian@intel.com>, <xudong.hao@intel.com>
Subject: Re: [PATCH v1 06/13] intel_iommu: Export some functions
Date: Wed, 18 Mar 2026 20:21:28 +0800	[thread overview]
Message-ID: <5a782ac7-1916-4be4-9947-ded11cc33cbe@intel.com> (raw)
In-Reply-To: <20260306034409.184873-7-zhenzhong.duan@intel.com>

On 3/6/26 11:44, Zhenzhong Duan wrote:
> Export some functions for accel code usages. Inline functions and MACROs
> are moved to internal header files. Then accel code in following patches
> could access them.
> 
> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
> Reviewed-by: Clement Mathieu--Drif <clement.mathieu--drif@eviden.com>
> ---
>   hw/i386/intel_iommu_internal.h | 31 +++++++++++++++++++++++++
>   hw/i386/intel_iommu.c          | 42 ++++++++--------------------------
>   2 files changed, 40 insertions(+), 33 deletions(-)

Reviewed-by: Yi Liu <yi.l.liu@intel.com>

> diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
> index db4f186a3e..c7e107fe87 100644
> --- a/hw/i386/intel_iommu_internal.h
> +++ b/hw/i386/intel_iommu_internal.h
> @@ -620,6 +620,12 @@ typedef struct VTDRootEntry VTDRootEntry;
>   #define VTD_SM_CONTEXT_ENTRY_RSVD_VAL1      0xffffffffffe00000ULL
>   #define VTD_SM_CONTEXT_ENTRY_PRE            0x10ULL
>   
> +/* context entry operations */
> +#define VTD_CE_GET_PASID_DIR_TABLE(ce) \
> +    ((ce)->val[0] & VTD_PASID_DIR_BASE_ADDR_MASK)
> +#define VTD_CE_GET_PRE(ce) \
> +    ((ce)->val[0] & VTD_SM_CONTEXT_ENTRY_PRE)
> +
>   typedef struct VTDPASIDCacheInfo {
>       uint8_t type;
>       uint16_t did;
> @@ -746,4 +752,29 @@ static inline bool vtd_pe_pgtt_is_fst(VTDPASIDEntry *pe)
>   {
>       return (VTD_SM_PASID_ENTRY_PGTT(pe) == VTD_SM_PASID_ENTRY_FST);
>   }
> +
> +static inline bool vtd_pdire_present(VTDPASIDDirEntry *pdire)
> +{
> +    return pdire->val & 1;
> +}
> +
> +static inline bool vtd_pe_present(VTDPASIDEntry *pe)
> +{
> +    return pe->val[0] & VTD_PASID_ENTRY_P;
> +}
> +
> +static inline int vtd_pasid_entry_compare(VTDPASIDEntry *p1, VTDPASIDEntry *p2)
> +{
> +    return memcmp(p1, p2, sizeof(*p1));
> +}
> +
> +int vtd_get_pdire_from_pdir_table(dma_addr_t pasid_dir_base, uint32_t pasid,
> +                                  VTDPASIDDirEntry *pdire);
> +int vtd_get_pe_in_pasid_leaf_table(IntelIOMMUState *s, uint32_t pasid,
> +                                   dma_addr_t addr, VTDPASIDEntry *pe);
> +int vtd_dev_to_context_entry(IntelIOMMUState *s, uint8_t bus_num,
> +                             uint8_t devfn, VTDContextEntry *ce);
> +int vtd_ce_get_pasid_entry(IntelIOMMUState *s, VTDContextEntry *ce,
> +                           VTDPASIDEntry *pe, uint32_t pasid);
> +VTDAddressSpace *vtd_get_as_by_sid(IntelIOMMUState *s, uint16_t sid);
>   #endif
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index e5b9689fae..744b5967b2 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -42,12 +42,6 @@
>   #include "migration/vmstate.h"
>   #include "trace.h"
>   
> -/* context entry operations */
> -#define VTD_CE_GET_PASID_DIR_TABLE(ce) \
> -    ((ce)->val[0] & VTD_PASID_DIR_BASE_ADDR_MASK)
> -#define VTD_CE_GET_PRE(ce) \
> -    ((ce)->val[0] & VTD_SM_CONTEXT_ENTRY_PRE)
> -
>   /*
>    * Paging mode for first-stage translation (VTD spec Figure 9-6)
>    * 00: 4-level paging, 01: 5-level paging
> @@ -831,18 +825,12 @@ static inline bool vtd_pe_type_check(IntelIOMMUState *s, VTDPASIDEntry *pe)
>       }
>   }
>   
> -static inline bool vtd_pdire_present(VTDPASIDDirEntry *pdire)
> -{
> -    return pdire->val & 1;
> -}
> -
>   /**
>    * Caller of this function should check present bit if wants
>    * to use pdir entry for further usage except for fpd bit check.
>    */
> -static int vtd_get_pdire_from_pdir_table(dma_addr_t pasid_dir_base,
> -                                         uint32_t pasid,
> -                                         VTDPASIDDirEntry *pdire)
> +int vtd_get_pdire_from_pdir_table(dma_addr_t pasid_dir_base, uint32_t pasid,
> +                                  VTDPASIDDirEntry *pdire)
>   {
>       uint32_t index;
>       dma_addr_t addr, entry_size;
> @@ -860,15 +848,8 @@ static int vtd_get_pdire_from_pdir_table(dma_addr_t pasid_dir_base,
>       return 0;
>   }
>   
> -static inline bool vtd_pe_present(VTDPASIDEntry *pe)
> -{
> -    return pe->val[0] & VTD_PASID_ENTRY_P;
> -}
> -
> -static int vtd_get_pe_in_pasid_leaf_table(IntelIOMMUState *s,
> -                                          uint32_t pasid,
> -                                          dma_addr_t addr,
> -                                          VTDPASIDEntry *pe)
> +int vtd_get_pe_in_pasid_leaf_table(IntelIOMMUState *s, uint32_t pasid,
> +                                   dma_addr_t addr, VTDPASIDEntry *pe)
>   {
>       uint8_t pgtt;
>       uint32_t index;
> @@ -954,8 +935,8 @@ static int vtd_get_pe_from_pasid_table(IntelIOMMUState *s,
>       return 0;
>   }
>   
> -static int vtd_ce_get_pasid_entry(IntelIOMMUState *s, VTDContextEntry *ce,
> -                                  VTDPASIDEntry *pe, uint32_t pasid)
> +int vtd_ce_get_pasid_entry(IntelIOMMUState *s, VTDContextEntry *ce,
> +                           VTDPASIDEntry *pe, uint32_t pasid)
>   {
>       dma_addr_t pasid_dir_base;
>   
> @@ -1526,8 +1507,8 @@ static int vtd_ce_pasid_0_check(IntelIOMMUState *s, VTDContextEntry *ce)
>   }
>   
>   /* Map a device to its corresponding domain (context-entry) */
> -static int vtd_dev_to_context_entry(IntelIOMMUState *s, uint8_t bus_num,
> -                                    uint8_t devfn, VTDContextEntry *ce)
> +int vtd_dev_to_context_entry(IntelIOMMUState *s, uint8_t bus_num,
> +                             uint8_t devfn, VTDContextEntry *ce)
>   {
>       VTDRootEntry re;
>       int ret_fr;
> @@ -1909,7 +1890,7 @@ static VTDAddressSpace *vtd_get_as_by_sid_and_pasid(IntelIOMMUState *s,
>                                vtd_find_as_by_sid_and_pasid, &key);
>   }
>   
> -static VTDAddressSpace *vtd_get_as_by_sid(IntelIOMMUState *s, uint16_t sid)
> +VTDAddressSpace *vtd_get_as_by_sid(IntelIOMMUState *s, uint16_t sid)
>   {
>       return vtd_get_as_by_sid_and_pasid(s, sid, PCI_NO_PASID);
>   }
> @@ -3133,11 +3114,6 @@ static inline int vtd_dev_get_pe_from_pasid(VTDAddressSpace *vtd_as,
>       return vtd_ce_get_pasid_entry(s, &ce, pe, vtd_as->pasid);
>   }
>   
> -static int vtd_pasid_entry_compare(VTDPASIDEntry *p1, VTDPASIDEntry *p2)
> -{
> -    return memcmp(p1, p2, sizeof(*p1));
> -}
> -
>   /* Update or invalidate pasid cache based on the pasid entry in guest memory. */
>   static void vtd_pasid_cache_sync_locked(gpointer key, gpointer value,
>                                           gpointer user_data)



  reply	other threads:[~2026-03-18 12:14 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-06  3:43 [PATCH v1 00/13] intel_iommu: Enable PASID support for passthrough device Zhenzhong Duan
2026-03-06  3:43 ` [PATCH v1 01/13] vfio/iommufd: Extend attach/detach_hwpt callback implementations with pasid Zhenzhong Duan
2026-03-18 11:55   ` Yi Liu
2026-03-19  7:43     ` Duan, Zhenzhong
2026-03-06  3:43 ` [PATCH v1 02/13] iommufd: Extend attach/detach_hwpt callbacks to support pasid Zhenzhong Duan
2026-03-18 12:03   ` Yi Liu
2026-03-18 12:15     ` Yi Liu
2026-03-19  7:47     ` Duan, Zhenzhong
2026-03-06  3:43 ` [PATCH v1 03/13] vfio/iommufd: Create nesting parent hwpt with IOMMU_HWPT_ALLOC_PASID flag Zhenzhong Duan
2026-03-18 12:15   ` Yi Liu
2026-03-19  7:54     ` Duan, Zhenzhong
2026-03-06  3:43 ` [PATCH v1 04/13] intel_iommu: Create the nested " Zhenzhong Duan
2026-03-06  7:27   ` CLEMENT MATHIEU--DRIF
2026-03-18 12:18   ` Yi Liu
2026-03-06  3:43 ` [PATCH v1 05/13] intel_iommu: Change pasid property from bool to uint8 Zhenzhong Duan
2026-03-18 12:20   ` Yi Liu
2026-03-19  8:08     ` Duan, Zhenzhong
2026-03-06  3:44 ` [PATCH v1 06/13] intel_iommu: Export some functions Zhenzhong Duan
2026-03-18 12:21   ` Yi Liu [this message]
2026-03-06  3:44 ` [PATCH v1 07/13] intel_iommu: Handle PASID entry addition for pc_inv_dsc request Zhenzhong Duan
2026-03-18 12:42   ` Yi Liu
2026-03-19  8:26     ` Duan, Zhenzhong
2026-03-20 10:13       ` Yi Liu
2026-03-23  5:59         ` Duan, Zhenzhong
2026-03-20 10:08   ` Yi Liu
2026-03-23  5:50     ` Duan, Zhenzhong
2026-03-23  7:38       ` Yi Liu
2026-03-23  8:11         ` Duan, Zhenzhong
2026-03-06  3:44 ` [PATCH v1 08/13] intel_iommu: Handle PASID entry removal " Zhenzhong Duan
2026-03-20 10:08   ` Yi Liu
2026-03-23  6:08     ` Duan, Zhenzhong
2026-03-23  7:40       ` Yi Liu
2026-03-23  8:12         ` Duan, Zhenzhong
2026-03-23  7:43       ` Yi Liu
2026-03-23  8:41         ` Duan, Zhenzhong
2026-03-06  3:44 ` [PATCH v1 09/13] intel_iommu: Handle PASID entry removal for system reset Zhenzhong Duan
2026-03-06  3:44 ` [PATCH v1 10/13] intel_iommu_accel: Support pasid binding/unbinding and PIOTLB flushing Zhenzhong Duan
2026-03-06  3:44 ` [PATCH v1 11/13] intel_iommu_accel: drop _lock suffix in vtd_flush_host_piotlb_all_locked() Zhenzhong Duan
2026-03-19  8:02   ` CLEMENT MATHIEU--DRIF
2026-03-19  9:07     ` Duan, Zhenzhong
2026-03-20  4:04       ` Duan, Zhenzhong
2026-03-06  3:44 ` [PATCH v1 12/13] intel_iommu_accel: Add pasid bits size check Zhenzhong Duan
2026-03-06  7:27   ` CLEMENT MATHIEU--DRIF
2026-03-09  2:16     ` Duan, Zhenzhong
2026-03-06  3:44 ` [PATCH v1 13/13] intel_iommu: Expose flag VIOMMU_FLAG_PASID_SUPPORTED when configured Zhenzhong Duan

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