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([2804:7f0:b400:8dcb:db2a:52bb:5a8e:66c5]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1f855ee847bsm16998965ad.168.2024.06.13.11.15.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 13 Jun 2024 11:15:23 -0700 (PDT) Subject: Re: [PATCH v2 6/9] target/arm: Factor out code for setting MTE TCF0 field To: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= , qemu-devel@nongnu.org, peter.maydell@linaro.org, alex.bennee@linaro.org, richard.henderson@linaro.org References: <20240613172103.2987519-1-gustavo.romero@linaro.org> <20240613172103.2987519-7-gustavo.romero@linaro.org> <20996ca9-9feb-42ee-8850-af265f77f72b@linaro.org> From: Gustavo Romero Message-ID: <5a93c441-d1a4-6f60-1b35-a313dd9a1b62@linaro.org> Date: Thu, 13 Jun 2024 15:15:20 -0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.6.0 MIME-Version: 1.0 In-Reply-To: <20996ca9-9feb-42ee-8850-af265f77f72b@linaro.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=gustavo.romero@linaro.org; helo=mail-pl1-x62b.google.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-1.395, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Phil, On 6/13/24 2:35 PM, Philippe Mathieu-Daudé wrote: > On 13/6/24 19:21, Gustavo Romero wrote: >> Factor out the code used for setting the MTE TCF0 field from the prctl >> code into a convenient function. Other subsystems, like gdbstub, need to >> set this field as well, so keep it as a separate function to avoid >> duplication and ensure consistency in how this field is set across the >> board. >> >> Signed-off-by: Gustavo Romero >> --- >>   linux-user/aarch64/target_prctl.h | 22 ++----------- >>   target/arm/mte.h                  | 53 +++++++++++++++++++++++++++++++ >>   2 files changed, 55 insertions(+), 20 deletions(-) >>   create mode 100644 target/arm/mte.h > > >> diff --git a/target/arm/mte.h b/target/arm/mte.h >> new file mode 100644 >> index 0000000000..89712aad70 >> --- /dev/null >> +++ b/target/arm/mte.h >> @@ -0,0 +1,53 @@ >> +/* >> + * ARM MemTag convenience functions. >> + * >> + * Copyright (c) 2024 Linaro, Ltd. >> + * >> + * This library is free software; you can redistribute it and/or >> + * modify it under the terms of the GNU Lesser General Public >> + * License as published by the Free Software Foundation; either >> + * version 2.1 of the License, or (at your option) any later version. >> + * >> + * This library is distributed in the hope that it will be useful, >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU >> + * Lesser General Public License for more details. >> + * >> + * You should have received a copy of the GNU Lesser General Public >> + * License along with this library; if not, see . >> + */ >> + >> +#ifndef MTE_H >> +#define MTE_H >> + >> +#ifdef CONFIG_TCG >> +#ifdef CONFIG_USER_ONLY >> +#include "sys/prctl.h" >> + >> +static void set_mte_tcf0(CPUArchState *env, abi_long value) > > Either declare it inlined (otherwise we'll get multiple symbols > declared if this header is included multiple times), or > preferably only expose the prototype. > > Also I'd use the 'arm_' prefix. Thanks, I forgot to add the inline hint and was really wondering if I should add the arm_ prefix. >> +{ >> +    /* >> +     * Write PR_MTE_TCF to SCTLR_EL1[TCF0]. >> +     * >> +     * The kernel has a per-cpu configuration for the sysadmin, >> +     * /sys/devices/system/cpu/cpu/mte_tcf_preferred, >> +     * which qemu does not implement. >> +     * >> +     * Because there is no performance difference between the modes, and >> +     * because SYNC is most useful for debugging MTE errors, choose SYNC >> +     * as the preferred mode.  With this preference, and the way the API >> +     * uses only two bits, there is no way for the program to select >> +     * ASYMM mode. >> +     */ >> +    unsigned tcf = 0; >> +    if (value & PR_MTE_TCF_SYNC) { >> +        tcf = 1; >> +    } else if (value & PR_MTE_TCF_ASYNC) { >> +        tcf = 2; >> +    } >> +    env->cp15.sctlr_el[1] = deposit64(env->cp15.sctlr_el[1], 38, 2, tcf); >> +} >> +#endif /* CONFIG_USER_ONLY */ >> +#endif /* CONFIG_TCG */ >> + >> +#endif /* MTE_H */ >