Re: [PATCH v2 11/42] accel/tcg: Perform aligned atomic reads in translator_ld

[Pierrick Bouvier <pierrick.bouvier@linaro.org>]

On 3/18/25 18:28, Richard Henderson wrote:
> On 3/18/25 17:15, Pierrick Bouvier wrote:
>>> @@ -329,7 +331,39 @@ static bool translator_ld(CPUArchState *env, DisasContextBase *db,
>>>            host = db->host_addr[1];
>>>        }
>>> -    memcpy(dest, host + (pc - base), len);
>>> + do_read:
>>> +    /*
>>> +     * Assume aligned reads should be atomic, if possible.
>>> +     * We're not in a position to jump out with EXCP_ATOMIC.
>>> +     */
>>> +    host += pc - base;
>>> +    switch (len) {
>>
>> Should we have a case for:
>> case 1:
>>       uint8_t t = *(uint8_t *)host;
>>       stb_he_p(dest, t);
>>       return true;
>>
>> To skip the memcpy for a single byte?
> 
> I guess only the i386 translator is going to be issuing byte code loads.  I wonder if it's
> measurable?  My gut reaction is that it isn't.
> 

If we see a memcpy at this spot in a profiling one day, it will always 
be time to revisit.
For now, it's ok for me. Just wonder why the case for len == 1 was not 
explicitely added.

> 
> r~