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[176.184.32.6]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6c9717b6e3sm635460066b.13.2024.06.11.01.25.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 11 Jun 2024 01:25:56 -0700 (PDT) Message-ID: <5b10d49a-8da2-491f-8b8c-26556482957d@linaro.org> Date: Tue, 11 Jun 2024 10:25:54 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/3] accel/tcg: Make TCGCPUOps::cpu_exec_halt mandatory To: Peter Maydell , qemu-devel@nongnu.org Cc: Richard Henderson References: <20240603160933.1141717-1-peter.maydell@linaro.org> <20240603160933.1141717-4-peter.maydell@linaro.org> Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20240603160933.1141717-4-peter.maydell@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::62a; envelope-from=philmd@linaro.org; helo=mail-ej1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Peter, On 3/6/24 18:09, Peter Maydell wrote: > Now that all targets set TCGCPUOps::cpu_exec_halt, we can make it > mandatory and remove the fallback handling that calls cpu_has_work. > > Signed-off-by: Peter Maydell > --- > include/hw/core/tcg-cpu-ops.h | 9 ++++++--- > accel/tcg/cpu-exec.c | 7 +------ > 2 files changed, 7 insertions(+), 9 deletions(-) > > diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h > index 099de3375e3..34318cf0e60 100644 > --- a/include/hw/core/tcg-cpu-ops.h > +++ b/include/hw/core/tcg-cpu-ops.h > @@ -122,10 +122,13 @@ struct TCGCPUOps { > * to do when the CPU is in the halted state. > * > * Return true to indicate that the CPU should now leave halt, false > - * if it should remain in the halted state. > + * if it should remain in the halted state. (This should generally > + * be the same value that cpu_has_work() would return.) > * > - * If this method is not provided, the default is to do nothing, and > - * to leave halt if cpu_has_work() returns true. > + * This method must be provided. If the target does not need to > + * do anything special for halt, the same function used for its > + * CPUClass::has_work method can be used here, as they have the > + * same function signature. > */ > bool (*cpu_exec_halt)(CPUState *cpu); > /** > diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c > index 6711b58e0b2..8be4d2a1330 100644 > --- a/accel/tcg/cpu-exec.c > +++ b/accel/tcg/cpu-exec.c > @@ -682,13 +682,8 @@ static inline bool cpu_handle_halt(CPUState *cpu) > #ifndef CONFIG_USER_ONLY > if (cpu->halted) { > const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops; > - bool leave_halt; > + bool leave_halt = tcg_ops->cpu_exec_halt(cpu); > > - if (tcg_ops->cpu_exec_halt) { > - leave_halt = tcg_ops->cpu_exec_halt(cpu); > - } else { > - leave_halt = cpu_has_work(cpu); > - } > if (!leave_halt) { > return true; > } Could we assert the handler is assigned in tcg_exec_realizefn()? If you agree I could squash these 3 lines: -- >8 -- --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -1077,6 +1077,10 @@ bool tcg_exec_realizefn(CPUState *cpu, Error **errp) static bool tcg_target_initialized; if (!tcg_target_initialized) { + /* Check mandatory TCGCPUOps handlers */ + assert(cpu->cc->tcg_ops->initialize); + assert(cpu->cc->tcg_ops->cpu_exec_halt); + cpu->cc->tcg_ops->initialize(); tcg_target_initialized = true; } --- Reviewed-by: Philippe Mathieu-Daudé