From: Richard Henderson <richard.henderson@linaro.org>
To: Mikael Szreder <git@miszr.win>, qemu-devel@nongnu.org
Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
Artyom Tarasenko <atar4qemu@gmail.com>
Subject: Re: [PATCH] target/sparc: Fix gdbstub incorrectly handling registers f32-f62
Date: Thu, 13 Feb 2025 11:11:28 -0800 [thread overview]
Message-ID: <5b29c7d9-2a2c-4cd4-a094-1aac8a34d3bb@linaro.org> (raw)
In-Reply-To: <C0AA2E55-2126-4399-8667-672ADD86B698@miszr.win>
On 2/13/25 11:03, Mikael Szreder wrote:
> Sorry. As you correctly pointed out there is no f33 register. I wrote f33, when I really meant f34.
>
> I believe the index of f32 is 64 and f34 is 65. This is confirmed when looking at the XML description of the registers in GDB: <https://sourceware.org/git/?p=binutils-gdb.git;a=blob;f=gdb/features/sparc/sparc64-fpu.xml;h=8710585774d821c660af5e76f92707637633daf7;hb=HEAD>
You're correct. As should also be obvious because 80 - 64 == 16.
So, we could use some updates to the patch description and to the comments within the code
itself to match.
r~
prev parent reply other threads:[~2025-02-13 19:12 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-03 14:50 [PATCH] target/sparc: Fix gdbstub incorrectly handling registers f32-f62 Mikael Szreder
2025-02-13 15:12 ` Mikael Szreder
2025-02-13 16:57 ` Richard Henderson
2025-02-13 19:03 ` Mikael Szreder
2025-02-13 19:11 ` Richard Henderson [this message]
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