qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Miles Glenn <milesg@linux.ibm.com>
To: Nicholas Piggin <npiggin@gmail.com>, qemu-ppc@nongnu.org
Cc: qemu-devel@nongnu.org, "Frédéric Barrat" <fbarrat@linux.ibm.com>,
	"Michael Kowal" <kowal@linux.ibm.com>,
	"Caleb Schlossin" <calebs@linux.vnet.ibm.com>,
	"Glenn Miles" <milesg@linux.vnet.ibm.com>
Subject: Re: [PATCH 17/50] pnv/xive2: Support ESB Escalation
Date: Fri, 16 May 2025 10:44:07 -0500	[thread overview]
Message-ID: <5b2ea8edf2f437b78e90fe3bcd9a78083fd652c0.camel@linux.ibm.com> (raw)
In-Reply-To: <D9X5A3I88C2Q.29RV6YVBVYJ27@gmail.com>

On Fri, 2025-05-16 at 10:05 +1000, Nicholas Piggin wrote:
> On Mon May 12, 2025 at 1:10 PM AEST, Nicholas Piggin wrote:
> > From: Glenn Miles <milesg@linux.vnet.ibm.com>
> > 
> > Add support for XIVE ESB Interrupt Escalation.
> > 
> > Suggested-by: Michael Kowal <kowal@linux.ibm.com>
> > [This change was taken from a patch provided by Michael Kowal.]
> > Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com>
> > ---
> >  hw/intc/xive2.c             | 62 ++++++++++++++++++++++++++++++-------
> >  include/hw/ppc/xive2.h      |  1 +
> >  include/hw/ppc/xive2_regs.h | 13 +++++---
> >  3 files changed, 59 insertions(+), 17 deletions(-)
> > 
> > diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c
> > index de139dcfbf..0993e792cc 100644
> > --- a/hw/intc/xive2.c
> > +++ b/hw/intc/xive2.c
> > @@ -1552,18 +1552,39 @@ do_escalation:
> >          }
> >      }
> >  
> > -    /*
> > -     * The END trigger becomes an Escalation trigger
> > -     */
> > -    xive2_router_end_notify(xrtr,
> > -                           xive_get_field32(END2_W4_END_BLOCK,     end.w4),
> > -                           xive_get_field32(END2_W4_ESC_END_INDEX, end.w4),
> > -                           xive_get_field32(END2_W5_ESC_END_DATA,  end.w5));
> > +    if (xive2_end_is_escalate_end(&end)) {
> > +        /*
> > +         * Perform END Adaptive escalation processing
> > +         * The END trigger becomes an Escalation trigger
> > +         */
> > +        xive2_router_end_notify(xrtr,
> > +                               xive_get_field32(END2_W4_END_BLOCK,     end.w4),
> > +                               xive_get_field32(END2_W4_ESC_END_INDEX, end.w4),
> > +                               xive_get_field32(END2_W5_ESC_END_DATA,  end.w5));
> > +    } /* end END adaptive escalation */
> > +
> > +    else {
> > +        uint32_t lisn;              /* Logical Interrupt Source Number */
> > +
> > +        /*
> > +         *  Perform ESB escalation processing
> > +         *      E[N] == 1 --> N
> > +         *      Req[Block] <- E[ESB_Block]
> > +         *      Req[Index] <- E[ESB_Index]
> > +         *      Req[Offset] <- 0x000
> > +         *      Execute <ESB Store> Req command
> > +         */
> > +        lisn = XIVE_EAS(xive_get_field32(END2_W4_END_BLOCK,     end.w4),
> > +                        xive_get_field32(END2_W4_ESC_END_INDEX, end.w4));
> > +
> > +        xive2_notify(xrtr, lisn, true /* pq_checked */);
> 
> Sorry I forgot to squash in a fix for the issues here. These should be
> _ESB_ constants not _END_, and we believe pq_checked should be false
> here so the ESB state machine is run.
> 
> https://lore.kernel.org/qemu-devel/D8CFK7Z5AJF8.ALT8MMH6EYYT@gmail.com/
> 
> I think we took discussion offline after that but that was the
> conclusion. I will sqash that fix in here. With that,
> 
> Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
> 
> I also wonder if Mike should be author of this patch since
> that's what the note indicates? Or co-author? Better give your
> Signed-off-by too, if so.
> 
> Thanks,
> Nick

Yes, this commit was taken verbatim from a diff that Mike Kowal
provided me.  I think he certainly deserves the credit.  I wasn't sure
how to do that.

Glenn



  reply	other threads:[~2025-05-16 15:45 UTC|newest]

Thread overview: 192+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-12  3:10 [PATCH 00/50] ppc/xive: updates for PowerVM Nicholas Piggin
2025-05-12  3:10 ` [PATCH 01/50] ppc/xive: Fix xive trace event output Nicholas Piggin
2025-05-14 14:26   ` Caleb Schlossin
2025-05-14 18:41   ` Mike Kowal
2025-05-15 15:30   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 02/50] ppc/xive: Report access size in XIVE TM operation error logs Nicholas Piggin
2025-05-14 14:27   ` Caleb Schlossin
2025-05-14 18:42   ` Mike Kowal
2025-05-15 15:31   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 03/50] ppc/xive2: Fix calculation of END queue sizes Nicholas Piggin
2025-05-14 14:27   ` Caleb Schlossin
2025-05-14 18:45   ` Mike Kowal
2025-05-16  0:06   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 04/50] ppc/xive2: Remote VSDs need to match on forwarding address Nicholas Piggin
2025-05-14 14:27   ` Caleb Schlossin
2025-05-14 18:46   ` Mike Kowal
2025-05-15 15:34   ` Miles Glenn
2025-05-16  0:08   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 05/50] ppc/xive2: fix context push calculation of IPB priority Nicholas Piggin
2025-05-14 14:30   ` Caleb Schlossin
2025-05-14 18:48   ` Mike Kowal
2025-05-15 15:36   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 06/50] ppc/xive: Fix PHYS NSR ring matching Nicholas Piggin
2025-05-14 14:30   ` Caleb Schlossin
2025-05-14 18:49   ` Mike Kowal
2025-05-15 15:39   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 07/50] ppc/xive2: Reset Generation Flipped bit on END Cache Watch Nicholas Piggin
2025-05-14 14:30   ` Caleb Schlossin
2025-05-14 18:50   ` Mike Kowal
2025-05-15 15:41   ` Miles Glenn
2025-05-16  0:09   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 08/50] ppc/xive2: Use fair irq target search algorithm Nicholas Piggin
2025-05-14 14:31   ` Caleb Schlossin
2025-05-14 18:51   ` Mike Kowal
2025-05-15 15:42   ` Miles Glenn
2025-05-16  0:12   ` Nicholas Piggin
2025-05-16 16:22     ` Mike Kowal
2025-05-12  3:10 ` [PATCH 09/50] ppc/xive2: Fix irq preempted by lower priority group irq Nicholas Piggin
2025-05-14 14:31   ` Caleb Schlossin
2025-05-14 18:52   ` Mike Kowal
2025-05-16  0:12   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 10/50] ppc/xive2: Fix treatment of PIPR in CPPR update Nicholas Piggin
2025-05-14 14:32   ` Caleb Schlossin
2025-05-14 18:53   ` Mike Kowal
2025-05-16  0:15   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 11/50] ppc/xive2: Do not present group interrupt on OS-push if precluded by CPPR Nicholas Piggin
2025-05-14 14:32   ` Caleb Schlossin
2025-05-14 18:54   ` Mike Kowal
2025-05-15 15:43   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 12/50] ppc/xive2: Set CPPR delivery should account for group priority Nicholas Piggin
2025-05-14 14:33   ` Caleb Schlossin
2025-05-14 18:57   ` Mike Kowal
2025-05-15 15:45   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 13/50] ppc/xive: tctx_notify should clear the precluded interrupt Nicholas Piggin
2025-05-14 14:33   ` Caleb Schlossin
2025-05-14 18:58   ` Mike Kowal
2025-05-15 15:46   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 14/50] ppc/xive: Explicitly zero NSR after accepting Nicholas Piggin
2025-05-14 14:34   ` Caleb Schlossin
2025-05-14 19:07   ` Mike Kowal
2025-05-15 23:31     ` Nicholas Piggin
2025-05-15 15:47   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 15/50] ppc/xive: Move NSR decoding into helper functions Nicholas Piggin
2025-05-14 14:35   ` Caleb Schlossin
2025-05-14 19:04   ` Mike Kowal
2025-05-15 15:48   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 16/50] ppc/xive: Fix pulling pool and phys contexts Nicholas Piggin
2025-05-14 14:36   ` Caleb Schlossin
2025-05-14 19:01   ` Mike Kowal
2025-05-15 15:49   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 17/50] pnv/xive2: Support ESB Escalation Nicholas Piggin
2025-05-14 14:36   ` Caleb Schlossin
2025-05-14 19:00   ` Mike Kowal
2025-05-16  0:05   ` Nicholas Piggin
2025-05-16 15:44     ` Miles Glenn [this message]
2025-05-12  3:10 ` [PATCH 18/50] pnv/xive2: Print value in invalid register write logging Nicholas Piggin
2025-05-14 14:36   ` Caleb Schlossin
2025-05-14 19:09   ` Mike Kowal
2025-05-15 15:50   ` Miles Glenn
2025-05-16  0:15   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 19/50] pnv/xive2: VC_ENDC_WATCH_SPEC regs should read back WATCH_FULL Nicholas Piggin
2025-05-14 14:37   ` Caleb Schlossin
2025-05-14 19:10   ` Mike Kowal
2025-05-15 15:51   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 20/50] pnv/xive2: Permit valid writes to VC/PC Flush Control registers Nicholas Piggin
2025-05-14 14:37   ` Caleb Schlossin
2025-05-14 19:11   ` Mike Kowal
2025-05-15 15:52   ` Miles Glenn
2025-05-16  0:18   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 21/50] ppc/xive2: add interrupt priority configuration flags Nicholas Piggin
2025-05-14 19:41   ` Mike Kowal
2025-05-16  0:18   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 22/50] ppc/xive2: Support redistribution of group interrupts Nicholas Piggin
2025-05-14 19:42   ` Mike Kowal
2025-05-16  0:19   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 23/50] ppc/xive: Add more interrupt notification tracing Nicholas Piggin
2025-05-14 19:46   ` Mike Kowal
2025-05-16  0:19   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 24/50] ppc/xive2: Improve pool regs variable name Nicholas Piggin
2025-05-14 19:47   ` Mike Kowal
2025-05-16  0:19   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 25/50] ppc/xive2: Implement "Ack OS IRQ to even report line" TIMA op Nicholas Piggin
2025-05-14 19:48   ` Mike Kowal
2025-05-16  0:20   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 26/50] ppc/xive2: Redistribute group interrupt precluded by CPPR update Nicholas Piggin
2025-05-14 19:48   ` Mike Kowal
2025-05-16  0:20   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 27/50] ppc/xive2: redistribute irqs for pool and phys ctx pull Nicholas Piggin
2025-05-14 19:51   ` Mike Kowal
2025-05-12  3:10 ` [PATCH 28/50] ppc/xive: Change presenter .match_nvt to match not present Nicholas Piggin
2025-05-14 19:54   ` Mike Kowal
2025-05-15 23:40     ` Nicholas Piggin
2025-05-15 15:53   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 29/50] ppc/xive2: Redistribute group interrupt preempted by higher priority interrupt Nicholas Piggin
2025-05-14 19:55   ` Mike Kowal
2025-05-15 15:54   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 30/50] ppc/xive: Add xive_tctx_pipr_present() to present new interrupt Nicholas Piggin
2025-05-14 20:10   ` Mike Kowal
2025-05-15 15:21     ` Mike Kowal
2025-05-15 23:51       ` Nicholas Piggin
2025-05-15 23:43     ` Nicholas Piggin
2025-05-15 15:55   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 31/50] ppc/xive: Fix high prio group interrupt being preempted by low prio VP Nicholas Piggin
2025-05-15 15:21   ` Mike Kowal
2025-05-15 15:55   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 32/50] ppc/xive: Split xive recompute from IPB function Nicholas Piggin
2025-05-14 20:42   ` Mike Kowal
2025-05-15 23:46     ` Nicholas Piggin
2025-05-15 15:56   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 33/50] ppc/xive: tctx signaling registers rework Nicholas Piggin
2025-05-14 20:49   ` Mike Kowal
2025-05-15 15:58   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 34/50] ppc/xive: tctx_accept only lower irq line if an interrupt was presented Nicholas Piggin
2025-05-15 15:16   ` Mike Kowal
2025-05-15 23:50     ` Nicholas Piggin
2025-05-15 16:04   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 35/50] ppc/xive: Add xive_tctx_pipr_set() helper function Nicholas Piggin
2025-05-15 15:18   ` Mike Kowal
2025-05-15 16:05   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 36/50] ppc/xive2: split tctx presentation processing from set CPPR Nicholas Piggin
2025-05-15 15:24   ` Mike Kowal
2025-05-15 16:06   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 37/50] ppc/xive2: Consolidate presentation processing in context push Nicholas Piggin
2025-05-15 15:25   ` Mike Kowal
2025-05-15 16:06   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 38/50] ppc/xive2: Avoid needless interrupt re-check on CPPR set Nicholas Piggin
2025-05-15 15:26   ` Mike Kowal
2025-05-15 16:07   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 39/50] ppc/xive: Assert group interrupts were redistributed Nicholas Piggin
2025-05-15 15:28   ` Mike Kowal
2025-05-15 16:08   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 40/50] ppc/xive2: implement NVP context save restore for POOL ring Nicholas Piggin
2025-05-15 15:36   ` Mike Kowal
2025-05-15 16:09   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 41/50] ppc/xive2: Prevent pulling of pool context losing phys interrupt Nicholas Piggin
2025-05-15 15:43   ` Mike Kowal
2025-05-15 16:10   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 42/50] ppc/xive: Redistribute phys after pulling of pool context Nicholas Piggin
2025-05-15 15:46   ` Mike Kowal
2025-05-15 16:11   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 43/50] ppc/xive: Check TIMA operations validity Nicholas Piggin
2025-05-15 15:47   ` Mike Kowal
2025-05-15 16:12   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 44/50] ppc/xive2: Implement pool context push TIMA op Nicholas Piggin
2025-05-15 15:48   ` Mike Kowal
2025-05-15 16:13   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 45/50] ppc/xive2: redistribute group interrupts on context push Nicholas Piggin
2025-05-15 15:44   ` Mike Kowal
2025-05-15 16:13   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 46/50] ppc/xive2: Implement set_os_pending TIMA op Nicholas Piggin
2025-05-15 15:49   ` Mike Kowal
2025-05-15 16:14   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 47/50] ppc/xive2: Implement POOL LGS push " Nicholas Piggin
2025-05-15 15:50   ` Mike Kowal
2025-05-15 16:15   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 48/50] ppc/xive2: Implement PHYS ring VP " Nicholas Piggin
2025-05-15 15:50   ` Mike Kowal
2025-05-15 16:16   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 49/50] ppc/xive: Split need_resend into restore_nvp Nicholas Piggin
2025-05-15 15:57   ` Mike Kowal
2025-05-15 16:16   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 50/50] ppc/xive2: Enable lower level contexts on VP push Nicholas Piggin
2025-05-15 15:54   ` Mike Kowal
2025-05-15 16:17   ` Miles Glenn
2025-05-15 15:36 ` [PATCH 00/50] ppc/xive: updates for PowerVM Cédric Le Goater
2025-05-16  1:29   ` Nicholas Piggin
2025-07-20 21:26     ` Cédric Le Goater
2025-08-04 17:37       ` Miles Glenn
2025-08-05  5:09         ` Cédric Le Goater
2025-08-05 15:52           ` Miles Glenn
2025-08-05 20:09             ` Cédric Le Goater
2025-07-03  9:37 ` Gautam Menghani

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=5b2ea8edf2f437b78e90fe3bcd9a78083fd652c0.camel@linux.ibm.com \
    --to=milesg@linux.ibm.com \
    --cc=calebs@linux.vnet.ibm.com \
    --cc=fbarrat@linux.ibm.com \
    --cc=kowal@linux.ibm.com \
    --cc=milesg@linux.vnet.ibm.com \
    --cc=npiggin@gmail.com \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).