From: "Filip Navara" <xnavara@volny.cz>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH] Intel cache info
Date: Sat, 8 Sep 2007 21:27:35 +0200 [thread overview]
Message-ID: <5b31733c0709081227w3e5f1036odbc649edfdc8c79b@mail.gmail.com> (raw)
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Fix the CPUID function 2 to correctly report cache info for the particular
processor. I chose the values closest to the ones reported in the AMD
registers. This is important for operating systems that detect cache line
width and later call CLFLUSH for each line. In the previous implementation
the values didn't specify L2 cache line width and so Darwin endlessly looped
trying to flush them.
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next reply other threads:[~2007-09-08 19:27 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-09-08 19:27 Filip Navara [this message]
2007-09-09 13:47 ` [Qemu-devel] [PATCH] Intel cache info Dan Kenigsberg
2007-09-09 15:04 ` Thiemo Seufer
2007-09-11 7:20 ` Filip Navara
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