From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MYZd1-0004aY-PR for qemu-devel@nongnu.org; Wed, 05 Aug 2009 02:05:35 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MYZcx-0004aL-Td for qemu-devel@nongnu.org; Wed, 05 Aug 2009 02:05:35 -0400 Received: from [199.232.76.173] (port=52223 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MYZcx-0004aH-8h for qemu-devel@nongnu.org; Wed, 05 Aug 2009 02:05:31 -0400 Received: from mail-ew0-f210.google.com ([209.85.219.210]:62928) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MYZcw-0002BU-Ls for qemu-devel@nongnu.org; Wed, 05 Aug 2009 02:05:30 -0400 Received: by ewy6 with SMTP id 6so648547ewy.34 for ; Tue, 04 Aug 2009 23:05:28 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <20090804231934.G93384@stanley.csl.cornell.edu> References: <20090804231934.G93384@stanley.csl.cornell.edu> Date: Wed, 5 Aug 2009 08:05:28 +0200 Message-ID: <5b31733c0908042305o77c31eb8pe369eb778da55a47@mail.gmail.com> Subject: Re: [Qemu-devel] [patch] Fix extlh instruction on Alpha From: Filip Navara Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Vince Weaver Cc: qemu-devel@nongnu.org On Wed, Aug 5, 2009 at 5:26 AM, Vince Weaver wrote: > Hello > > The extlh instruction on Alpha currently doesn't work properly. > It's a combination of a cut/paste bug (16 where it should be 32) as well > as a "shift by 64" bug. > > Below is a patch that fixes the problem, and attached is a test case that > exhibits the bug. =A0The program should print a 4-char wide sliding windo= w > across the test string; without the patch this fails. > > Vince > > Signed-off-by: Vince Weaver > > diff --git a/target-alpha/translate.c b/target-alpha/translate.c > index 1fc5119..2a681b0 100644 > --- a/target-alpha/translate.c > +++ b/target-alpha/translate.c > @@ -526,14 +526,24 @@ static always_inline void gen_ext_h(void (*tcg_gen_= ext_i64)(TCGv t0, TCGv t1), > =A0 =A0 =A0 =A0 =A0 =A0 else > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[ra]); > =A0 =A0 =A0 =A0 } else { > + =A0 =A0 =A0 =A0 =A0 =A0int l1; > =A0 =A0 =A0 =A0 =A0 =A0 TCGv tmp1, tmp2; > =A0 =A0 =A0 =A0 =A0 =A0 tmp1 =3D tcg_temp_new(); This should be tcg_temp_local_new since you added a branch instruction and normal temporary variables are live in a basic block (eg. not across a branch). > + =A0 =A0 =A0 =A0 =A0 =A0l1 =3D gen_new_label(); > + > =A0 =A0 =A0 =A0 =A0 =A0 tcg_gen_andi_i64(tmp1, cpu_ir[rb], 7); > =A0 =A0 =A0 =A0 =A0 =A0 tcg_gen_shli_i64(tmp1, tmp1, 3); > + > + =A0 =A0 =A0 =A0 =A0 =A0tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[ra]); > + =A0 =A0 =A0 =A0 =A0 =A0tcg_gen_brcondi_i64(TCG_COND_EQ, tmp1, 0, l1); > + > =A0 =A0 =A0 =A0 =A0 =A0 tmp2 =3D tcg_const_i64(64); > =A0 =A0 =A0 =A0 =A0 =A0 tcg_gen_sub_i64(tmp1, tmp2, tmp1); > =A0 =A0 =A0 =A0 =A0 =A0 tcg_temp_free(tmp2); > =A0 =A0 =A0 =A0 =A0 =A0 tcg_gen_shl_i64(cpu_ir[rc], cpu_ir[ra], tmp1); > + > + =A0 =A0 =A0 =A0 =A0 =A0gen_set_label(l1); > + > =A0 =A0 =A0 =A0 =A0 =A0 tcg_temp_free(tmp1); > =A0 =A0 =A0 =A0 } > =A0 =A0 =A0 =A0 if (tcg_gen_ext_i64) > @@ -1320,7 +1330,7 @@ static always_inline int translate_one (DisasContex= t *ctx, uint32_t insn) > =A0 =A0 =A0 =A0 =A0 =A0 break; > =A0 =A0 =A0 =A0 case 0x6A: > =A0 =A0 =A0 =A0 =A0 =A0 /* EXTLH */ > - =A0 =A0 =A0 =A0 =A0 =A0gen_ext_h(&tcg_gen_ext16u_i64, ra, rb, rc, islit= , lit); > + =A0 =A0 =A0 =A0 =A0 =A0gen_ext_h(&tcg_gen_ext32u_i64, ra, rb, rc, islit= , lit); > =A0 =A0 =A0 =A0 =A0 =A0 break; > =A0 =A0 =A0 =A0 case 0x72: > =A0 =A0 =A0 =A0 =A0 =A0 /* MSKQH */ Best regards, Filip Navara