From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Richard Henderson" <richard.henderson@linaro.org>,
qemu-devel@nongnu.org
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Anton Johansson" <anjo@rev.ng>
Subject: Re: [PATCH-for-10.1 1/4] tcg: Always define TCG_GUEST_DEFAULT_MO
Date: Fri, 21 Mar 2025 10:44:05 -0700 [thread overview]
Message-ID: <5b6baf4f-0b84-4d07-8c3f-d01b9b9a0678@linaro.org> (raw)
In-Reply-To: <20250321125737.72839-2-philmd@linaro.org>
On 3/21/25 05:57, Philippe Mathieu-Daudé wrote:
> We only require the TCG_GUEST_DEFAULT_MO for MTTCG-enabled
> frontends, otherwise we use a default value of TCG_MO_ALL.
>
> In order to simplify, require the definition for all targets,
> defining it for hexagon, m68k, rx, sh4 and tricore.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> target/hexagon/cpu-param.h | 3 +++
> target/m68k/cpu-param.h | 3 +++
> target/rx/cpu-param.h | 3 +++
> target/sh4/cpu-param.h | 3 +++
> target/tricore/cpu-param.h | 3 +++
> accel/tcg/translate-all.c | 4 ----
> 6 files changed, 15 insertions(+), 4 deletions(-)
>
> diff --git a/target/hexagon/cpu-param.h b/target/hexagon/cpu-param.h
> index 45ee7b46409..2d57ea6caf9 100644
> --- a/target/hexagon/cpu-param.h
> +++ b/target/hexagon/cpu-param.h
> @@ -23,4 +23,7 @@
> #define TARGET_PHYS_ADDR_SPACE_BITS 36
> #define TARGET_VIRT_ADDR_SPACE_BITS 32
>
> +/* MTTCG not yet supported: require strict ordering */
> +#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL
> +
> #endif
> diff --git a/target/m68k/cpu-param.h b/target/m68k/cpu-param.h
> index 7afbf6d302d..1a909eaa13e 100644
> --- a/target/m68k/cpu-param.h
> +++ b/target/m68k/cpu-param.h
> @@ -17,4 +17,7 @@
> #define TARGET_PHYS_ADDR_SPACE_BITS 32
> #define TARGET_VIRT_ADDR_SPACE_BITS 32
>
> +/* MTTCG not yet supported: require strict ordering */
> +#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL
> +
> #endif
> diff --git a/target/rx/cpu-param.h b/target/rx/cpu-param.h
> index ef1970a09e9..2ce199164d7 100644
> --- a/target/rx/cpu-param.h
> +++ b/target/rx/cpu-param.h
> @@ -24,4 +24,7 @@
> #define TARGET_PHYS_ADDR_SPACE_BITS 32
> #define TARGET_VIRT_ADDR_SPACE_BITS 32
>
> +/* MTTCG not yet supported: require strict ordering */
> +#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL
> +
> #endif
> diff --git a/target/sh4/cpu-param.h b/target/sh4/cpu-param.h
> index 2b6e11dd0ac..1bc90d4695e 100644
> --- a/target/sh4/cpu-param.h
> +++ b/target/sh4/cpu-param.h
> @@ -16,4 +16,7 @@
> # define TARGET_VIRT_ADDR_SPACE_BITS 32
> #endif
>
> +/* MTTCG not yet supported: require strict ordering */
> +#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL
> +
> #endif
> diff --git a/target/tricore/cpu-param.h b/target/tricore/cpu-param.h
> index 790242ef3d2..923459370cc 100644
> --- a/target/tricore/cpu-param.h
> +++ b/target/tricore/cpu-param.h
> @@ -12,4 +12,7 @@
> #define TARGET_PHYS_ADDR_SPACE_BITS 32
> #define TARGET_VIRT_ADDR_SPACE_BITS 32
>
> +/* MTTCG not yet supported: require strict ordering */
> +#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL
> +
> #endif
> diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
> index 82bc16bd535..fb9f83dbba3 100644
> --- a/accel/tcg/translate-all.c
> +++ b/accel/tcg/translate-all.c
> @@ -349,11 +349,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
> tcg_ctx->tlb_dyn_max_bits = CPU_TLB_DYN_MAX_BITS;
> #endif
> tcg_ctx->insn_start_words = TARGET_INSN_START_WORDS;
> -#ifdef TCG_GUEST_DEFAULT_MO
> tcg_ctx->guest_mo = TCG_GUEST_DEFAULT_MO;
> -#else
> - tcg_ctx->guest_mo = TCG_MO_ALL;
> -#endif
>
> restart_translate:
> trace_translate_block(tb, pc, tb->tc.ptr);
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
next prev parent reply other threads:[~2025-03-21 17:44 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-21 12:57 [RFC PATCH-for-10.1 0/4] tcg: Move TCG_GUEST_DEFAULT_MO -> TCGCPUOps::guest_default_memory_order Philippe Mathieu-Daudé
2025-03-21 12:57 ` [PATCH-for-10.1 1/4] tcg: Always define TCG_GUEST_DEFAULT_MO Philippe Mathieu-Daudé
2025-03-21 14:39 ` Anton Johansson via
2025-03-21 15:14 ` Richard Henderson
2025-03-21 17:44 ` Pierrick Bouvier [this message]
2025-03-21 12:57 ` [PATCH-for-10.1 2/4] tcg: Simplify tcg_req_mo() macro Philippe Mathieu-Daudé
2025-03-21 14:40 ` Anton Johansson via
2025-03-21 15:14 ` Richard Henderson
2025-03-21 17:44 ` Pierrick Bouvier
2025-03-21 12:57 ` [RFC PATCH-for-10.1 3/4] tcg: Have tcg_req_mo() use runtime TCGContext::guest_mo Philippe Mathieu-Daudé
2025-03-21 14:39 ` Anton Johansson via
2025-03-21 14:46 ` Philippe Mathieu-Daudé
2025-03-21 15:16 ` Richard Henderson
2025-03-21 12:57 ` [RFC PATCH-for-10.1 4/4] tcg: Define guest_default_memory_order in TCGCPUOps Philippe Mathieu-Daudé
2025-03-21 13:20 ` Philippe Mathieu-Daudé
2025-03-21 14:34 ` Anton Johansson via
2025-03-21 15:25 ` Richard Henderson
2025-03-21 17:47 ` Pierrick Bouvier
2025-03-21 14:40 ` [RFC PATCH-for-10.1 0/4] tcg: Move TCG_GUEST_DEFAULT_MO -> TCGCPUOps::guest_default_memory_order Anton Johansson via
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