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[88.26.246.243]) by smtp.gmail.com with ESMTPSA id 143sm5293421wmb.33.2019.10.17.08.47.17 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 17 Oct 2019 08:47:18 -0700 (PDT) Subject: Re: [PATCH 6/8] hw/watchdog/etraxfs_timer.c: Switch to transaction-based ptimer API To: Peter Maydell , qemu-devel@nongnu.org References: <20191017132905.5604-1-peter.maydell@linaro.org> <20191017132905.5604-7-peter.maydell@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: <5b959611-2c0d-0368-a035-bfd03daf6e13@redhat.com> Date: Thu, 17 Oct 2019 17:47:15 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.1.1 MIME-Version: 1.0 In-Reply-To: <20191017132905.5604-7-peter.maydell@linaro.org> Content-Language: en-US X-MC-Unique: ZrlhSmk1Nc2Iee29OD4x5g-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 205.139.110.120 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , "Edgar E. Iglesias" , Michael Walle , Guan Xuetao , Magnus Damm Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 10/17/19 3:29 PM, Peter Maydell wrote: > Switch the etraxfs_timer code away from bottom-half based ptimers to > the new transaction-based ptimer API. This just requires adding > begin/commit calls around the various places that modify the ptimer > state, and using the new ptimer_init() function to create the timer. >=20 > Signed-off-by: Peter Maydell > --- > hw/timer/etraxfs_timer.c | 23 +++++++++++++---------- > 1 file changed, 13 insertions(+), 10 deletions(-) >=20 > diff --git a/hw/timer/etraxfs_timer.c b/hw/timer/etraxfs_timer.c > index ab27fe1895b..afe3d30a8ea 100644 > --- a/hw/timer/etraxfs_timer.c > +++ b/hw/timer/etraxfs_timer.c > @@ -26,7 +26,6 @@ > #include "hw/sysbus.h" > #include "sysemu/reset.h" > #include "sysemu/runstate.h" > -#include "qemu/main-loop.h" > #include "qemu/module.h" > #include "qemu/timer.h" > #include "hw/irq.h" > @@ -59,9 +58,6 @@ typedef struct ETRAXTimerState { > qemu_irq irq; > qemu_irq nmi; > =20 > - QEMUBH *bh_t0; > - QEMUBH *bh_t1; > - QEMUBH *bh_wd; > ptimer_state *ptimer_t0; > ptimer_state *ptimer_t1; > ptimer_state *ptimer_wd; > @@ -155,6 +151,7 @@ static void update_ctrl(ETRAXTimerState *t, int tnum) > } > =20 > D(printf ("freq_hz=3D%d div=3D%d\n", freq_hz, div)); > + ptimer_transaction_begin(timer); > ptimer_set_freq(timer, freq_hz); > ptimer_set_limit(timer, div, 0); > =20 > @@ -176,6 +173,7 @@ static void update_ctrl(ETRAXTimerState *t, int tnum) > abort(); > break; > } > + ptimer_transaction_commit(timer); > } > =20 > static void timer_update_irq(ETRAXTimerState *t) > @@ -240,6 +238,7 @@ static inline void timer_watchdog_update(ETRAXTimerSt= ate *t, uint32_t value) > =20 > t->wd_hits =3D 0; > =20 > + ptimer_transaction_begin(t->ptimer_wd); > ptimer_set_freq(t->ptimer_wd, 760); > if (wd_cnt =3D=3D 0) > wd_cnt =3D 256; > @@ -250,6 +249,7 @@ static inline void timer_watchdog_update(ETRAXTimerSt= ate *t, uint32_t value) > ptimer_stop(t->ptimer_wd); > =20 > t->rw_wd_ctrl =3D value; > + ptimer_transaction_commit(t->ptimer_wd); > } > =20 > static void > @@ -311,9 +311,15 @@ static void etraxfs_timer_reset(void *opaque) > { > ETRAXTimerState *t =3D opaque; > =20 > + ptimer_transaction_begin(t->ptimer_t0); > ptimer_stop(t->ptimer_t0); > + ptimer_transaction_commit(t->ptimer_t0); > + ptimer_transaction_begin(t->ptimer_t1); > ptimer_stop(t->ptimer_t1); > + ptimer_transaction_commit(t->ptimer_t1); > + ptimer_transaction_begin(t->ptimer_wd); > ptimer_stop(t->ptimer_wd); > + ptimer_transaction_commit(t->ptimer_wd); > t->rw_wd_ctrl =3D 0; > t->r_intr =3D 0; > t->rw_intr_mask =3D 0; > @@ -325,12 +331,9 @@ static void etraxfs_timer_realize(DeviceState *dev, = Error **errp) > ETRAXTimerState *t =3D ETRAX_TIMER(dev); > SysBusDevice *sbd =3D SYS_BUS_DEVICE(dev); > =20 > - t->bh_t0 =3D qemu_bh_new(timer0_hit, t); > - t->bh_t1 =3D qemu_bh_new(timer1_hit, t); > - t->bh_wd =3D qemu_bh_new(watchdog_hit, t); > - t->ptimer_t0 =3D ptimer_init_with_bh(t->bh_t0, PTIMER_POLICY_DEFAULT= ); > - t->ptimer_t1 =3D ptimer_init_with_bh(t->bh_t1, PTIMER_POLICY_DEFAULT= ); > - t->ptimer_wd =3D ptimer_init_with_bh(t->bh_wd, PTIMER_POLICY_DEFAULT= ); > + t->ptimer_t0 =3D ptimer_init(timer0_hit, t, PTIMER_POLICY_DEFAULT); > + t->ptimer_t1 =3D ptimer_init(timer1_hit, t, PTIMER_POLICY_DEFAULT); > + t->ptimer_wd =3D ptimer_init(watchdog_hit, t, PTIMER_POLICY_DEFAULT)= ; > =20 > sysbus_init_irq(sbd, &t->irq); > sysbus_init_irq(sbd, &t->nmi); >=20 Reviewed-by: Philippe Mathieu-Daud=C3=A9