* [PATCH v2 01/14] meson: Drop tcg as a module
2025-02-03 3:18 [PATCH v2 00/14] meson: Deprecate 32-bit host support Richard Henderson
@ 2025-02-03 3:18 ` Richard Henderson
2025-02-03 9:58 ` Thomas Huth
` (2 more replies)
2025-02-03 3:18 ` [PATCH v2 02/14] tcg: Move stubs in tcg/perf.h to tcg/perf-stubs.c Richard Henderson
` (13 subsequent siblings)
14 siblings, 3 replies; 62+ messages in thread
From: Richard Henderson @ 2025-02-03 3:18 UTC (permalink / raw)
To: qemu-devel; +Cc: pbonzini, mark.cave-ayland, berrange, philmd, thuth
The fact that this is only enabled for x86 probably means it
was done incorrectly. Certainly the set of files selected to
go into the module is woefully incomplete. Drop it for now.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/meson.build | 11 ++++-------
meson.build | 18 +-----------------
2 files changed, 5 insertions(+), 24 deletions(-)
diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index aef80de967..69f4808ac4 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -21,16 +21,13 @@ specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_specific_ss)
specific_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: files(
'cputlb.c',
'watchpoint.c',
+ 'tcg-accel-ops.c',
+ 'tcg-accel-ops-mttcg.c',
+ 'tcg-accel-ops-icount.c',
+ 'tcg-accel-ops-rr.c',
))
system_ss.add(when: ['CONFIG_TCG'], if_true: files(
'icount-common.c',
'monitor.c',
))
-
-tcg_module_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: files(
- 'tcg-accel-ops.c',
- 'tcg-accel-ops-mttcg.c',
- 'tcg-accel-ops-icount.c',
- 'tcg-accel-ops-rr.c',
-))
diff --git a/meson.build b/meson.build
index 2c9ac9cfe1..b72114819b 100644
--- a/meson.build
+++ b/meson.build
@@ -322,12 +322,6 @@ if cpu in ['x86', 'x86_64']
}
endif
-modular_tcg = []
-# Darwin does not support references to thread-local variables in modules
-if host_os != 'darwin'
- modular_tcg = ['i386-softmmu', 'x86_64-softmmu']
-endif
-
##################
# Compiler flags #
##################
@@ -3279,11 +3273,6 @@ foreach target : target_dirs
if sym == 'CONFIG_TCG' or target in accelerator_targets.get(sym, [])
config_target += { sym: 'y' }
config_all_accel += { sym: 'y' }
- if target in modular_tcg
- config_target += { 'CONFIG_TCG_MODULAR': 'y' }
- else
- config_target += { 'CONFIG_TCG_BUILTIN': 'y' }
- endif
target_kconfig += [ sym + '=y' ]
endif
endforeach
@@ -3642,7 +3631,6 @@ util_ss = ss.source_set()
# accel modules
qtest_module_ss = ss.source_set()
-tcg_module_ss = ss.source_set()
modules = {}
target_modules = {}
@@ -3803,11 +3791,7 @@ subdir('tests/qtest/libqos')
subdir('tests/qtest/fuzz')
# accel modules
-tcg_real_module_ss = ss.source_set()
-tcg_real_module_ss.add_all(when: 'CONFIG_TCG_MODULAR', if_true: tcg_module_ss)
-specific_ss.add_all(when: 'CONFIG_TCG_BUILTIN', if_true: tcg_module_ss)
-target_modules += { 'accel' : { 'qtest': qtest_module_ss,
- 'tcg': tcg_real_module_ss }}
+target_modules += { 'accel' : { 'qtest': qtest_module_ss }}
##############################################
# Internal static_libraries and dependencies #
--
2.43.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v2 01/14] meson: Drop tcg as a module
2025-02-03 3:18 ` [PATCH v2 01/14] meson: Drop tcg as a module Richard Henderson
@ 2025-02-03 9:58 ` Thomas Huth
2025-02-03 18:39 ` Philippe Mathieu-Daudé
2025-02-03 11:34 ` Alex Bennée
2025-02-03 18:36 ` Philippe Mathieu-Daudé
2 siblings, 1 reply; 62+ messages in thread
From: Thomas Huth @ 2025-02-03 9:58 UTC (permalink / raw)
To: Richard Henderson, qemu-devel, Gerd Hoffmann
Cc: pbonzini, mark.cave-ayland, berrange, philmd, Jose R. Ziviani
On 03/02/2025 04.18, Richard Henderson wrote:
> The fact that this is only enabled for x86 probably means it
> was done incorrectly. Certainly the set of files selected to
> go into the module is woefully incomplete. Drop it for now.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/meson.build | 11 ++++-------
> meson.build | 18 +-----------------
> 2 files changed, 5 insertions(+), 24 deletions(-)
Looking at the cover letter
https://lore.kernel.org/qemu-devel/20210624103836.2382472-1-kraxel@redhat.com/
it indeed only mentions "a small fraction of tcg (x86 only)", and since
there were no follow up patches, it sounds like an incomplete conversion to
me. So reverting it three and a half years later sounds reasonable.
Reviewed-by: Thomas Huth <thuth@redhat.com>
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 01/14] meson: Drop tcg as a module
2025-02-03 9:58 ` Thomas Huth
@ 2025-02-03 18:39 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-02-03 18:39 UTC (permalink / raw)
To: Thomas Huth, Richard Henderson, qemu-devel, Gerd Hoffmann
Cc: pbonzini, mark.cave-ayland, berrange, Jose R. Ziviani
On 3/2/25 10:58, Thomas Huth wrote:
> On 03/02/2025 04.18, Richard Henderson wrote:
>> The fact that this is only enabled for x86 probably means it
>> was done incorrectly. Certainly the set of files selected to
>> go into the module is woefully incomplete. Drop it for now.
Maybe add:
This mostly revert commit dae0ec159f9 ("accel: build tcg modular").
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>> accel/tcg/meson.build | 11 ++++-------
>> meson.build | 18 +-----------------
>> 2 files changed, 5 insertions(+), 24 deletions(-)
>
> Looking at the cover letter https://lore.kernel.org/qemu-
> devel/20210624103836.2382472-1-kraxel@redhat.com/ it indeed only
> mentions "a small fraction of tcg (x86 only)", and since there were no
> follow up patches, it sounds like an incomplete conversion to me. So
> reverting it three and a half years later sounds reasonable.
>
> Reviewed-by: Thomas Huth <thuth@redhat.com>
>
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 01/14] meson: Drop tcg as a module
2025-02-03 3:18 ` [PATCH v2 01/14] meson: Drop tcg as a module Richard Henderson
2025-02-03 9:58 ` Thomas Huth
@ 2025-02-03 11:34 ` Alex Bennée
2025-02-03 18:36 ` Philippe Mathieu-Daudé
2 siblings, 0 replies; 62+ messages in thread
From: Alex Bennée @ 2025-02-03 11:34 UTC (permalink / raw)
To: Richard Henderson
Cc: qemu-devel, pbonzini, mark.cave-ayland, berrange, philmd, thuth
Richard Henderson <richard.henderson@linaro.org> writes:
> The fact that this is only enabled for x86 probably means it
> was done incorrectly. Certainly the set of files selected to
> go into the module is woefully incomplete. Drop it for now.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 01/14] meson: Drop tcg as a module
2025-02-03 3:18 ` [PATCH v2 01/14] meson: Drop tcg as a module Richard Henderson
2025-02-03 9:58 ` Thomas Huth
2025-02-03 11:34 ` Alex Bennée
@ 2025-02-03 18:36 ` Philippe Mathieu-Daudé
2 siblings, 0 replies; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-02-03 18:36 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: pbonzini, mark.cave-ayland, berrange, thuth
On 3/2/25 04:18, Richard Henderson wrote:
> The fact that this is only enabled for x86 probably means it
> was done incorrectly. Certainly the set of files selected to
> go into the module is woefully incomplete. Drop it for now.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/meson.build | 11 ++++-------
> meson.build | 18 +-----------------
> 2 files changed, 5 insertions(+), 24 deletions(-)
💗
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v2 02/14] tcg: Move stubs in tcg/perf.h to tcg/perf-stubs.c
2025-02-03 3:18 [PATCH v2 00/14] meson: Deprecate 32-bit host support Richard Henderson
2025-02-03 3:18 ` [PATCH v2 01/14] meson: Drop tcg as a module Richard Henderson
@ 2025-02-03 3:18 ` Richard Henderson
2025-02-03 10:00 ` Thomas Huth
2025-02-03 11:34 ` Alex Bennée
2025-02-03 3:18 ` [PATCH v2 03/14] plugins: Uninline qemu_plugin_add_opts Richard Henderson
` (12 subsequent siblings)
14 siblings, 2 replies; 62+ messages in thread
From: Richard Henderson @ 2025-02-03 3:18 UTC (permalink / raw)
To: qemu-devel; +Cc: pbonzini, mark.cave-ayland, berrange, philmd, thuth
These are not called so frequently as to be
performance sensitive.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/tcg/perf.h | 23 -----------------------
tcg/perf-stubs.c | 26 ++++++++++++++++++++++++++
tcg/meson.build | 2 ++
3 files changed, 28 insertions(+), 23 deletions(-)
create mode 100644 tcg/perf-stubs.c
diff --git a/include/tcg/perf.h b/include/tcg/perf.h
index c96b5920a3..050ba855ab 100644
--- a/include/tcg/perf.h
+++ b/include/tcg/perf.h
@@ -7,7 +7,6 @@
#ifndef TCG_PERF_H
#define TCG_PERF_H
-#if defined(CONFIG_TCG) && defined(CONFIG_LINUX)
/* Start writing perf-<pid>.map. */
void perf_enable_perfmap(void);
@@ -23,27 +22,5 @@ void perf_report_code(uint64_t guest_pc, TranslationBlock *tb,
/* Stop writing perf-<pid>.map and/or jit-<pid>.dump. */
void perf_exit(void);
-#else
-static inline void perf_enable_perfmap(void)
-{
-}
-
-static inline void perf_enable_jitdump(void)
-{
-}
-
-static inline void perf_report_prologue(const void *start, size_t size)
-{
-}
-
-static inline void perf_report_code(uint64_t guest_pc, TranslationBlock *tb,
- const void *start)
-{
-}
-
-static inline void perf_exit(void)
-{
-}
-#endif
#endif
diff --git a/tcg/perf-stubs.c b/tcg/perf-stubs.c
new file mode 100644
index 0000000000..ce2dd1a4b7
--- /dev/null
+++ b/tcg/perf-stubs.c
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* TCG perf stubs */
+
+#include "qemu/osdep.h"
+#include "tcg/perf.h"
+
+void perf_enable_perfmap(void)
+{
+}
+
+void perf_enable_jitdump(void)
+{
+}
+
+void perf_report_prologue(const void *start, size_t size)
+{
+}
+
+void perf_report_code(uint64_t guest_pc, TranslationBlock *tb,
+ const void *start)
+{
+}
+
+void perf_exit(void)
+{
+}
diff --git a/tcg/meson.build b/tcg/meson.build
index 69ebb4908a..2977df5862 100644
--- a/tcg/meson.build
+++ b/tcg/meson.build
@@ -25,6 +25,8 @@ endif
tcg_ss.add(when: libdw, if_true: files('debuginfo.c'))
if host_os == 'linux'
tcg_ss.add(files('perf.c'))
+else
+ tcg_ss.add(files('perf-stubs.c'))
endif
tcg_ss = tcg_ss.apply({})
--
2.43.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v2 02/14] tcg: Move stubs in tcg/perf.h to tcg/perf-stubs.c
2025-02-03 3:18 ` [PATCH v2 02/14] tcg: Move stubs in tcg/perf.h to tcg/perf-stubs.c Richard Henderson
@ 2025-02-03 10:00 ` Thomas Huth
2025-02-03 11:34 ` Alex Bennée
1 sibling, 0 replies; 62+ messages in thread
From: Thomas Huth @ 2025-02-03 10:00 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
Cc: pbonzini, mark.cave-ayland, berrange, philmd
On 03/02/2025 04.18, Richard Henderson wrote:
> These are not called so frequently as to be
> performance sensitive.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/tcg/perf.h | 23 -----------------------
> tcg/perf-stubs.c | 26 ++++++++++++++++++++++++++
> tcg/meson.build | 2 ++
> 3 files changed, 28 insertions(+), 23 deletions(-)
> create mode 100644 tcg/perf-stubs.c
Reviewed-by: Thomas Huth <thuth@redhat.com>
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 02/14] tcg: Move stubs in tcg/perf.h to tcg/perf-stubs.c
2025-02-03 3:18 ` [PATCH v2 02/14] tcg: Move stubs in tcg/perf.h to tcg/perf-stubs.c Richard Henderson
2025-02-03 10:00 ` Thomas Huth
@ 2025-02-03 11:34 ` Alex Bennée
1 sibling, 0 replies; 62+ messages in thread
From: Alex Bennée @ 2025-02-03 11:34 UTC (permalink / raw)
To: Richard Henderson
Cc: qemu-devel, pbonzini, mark.cave-ayland, berrange, philmd, thuth
Richard Henderson <richard.henderson@linaro.org> writes:
> These are not called so frequently as to be
> performance sensitive.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v2 03/14] plugins: Uninline qemu_plugin_add_opts
2025-02-03 3:18 [PATCH v2 00/14] meson: Deprecate 32-bit host support Richard Henderson
2025-02-03 3:18 ` [PATCH v2 01/14] meson: Drop tcg as a module Richard Henderson
2025-02-03 3:18 ` [PATCH v2 02/14] tcg: Move stubs in tcg/perf.h to tcg/perf-stubs.c Richard Henderson
@ 2025-02-03 3:18 ` Richard Henderson
2025-02-03 10:02 ` Thomas Huth
2025-02-03 11:44 ` Alex Bennée
2025-02-03 3:18 ` [PATCH v2 04/14] meson: Introduce CONFIG_TCG_TARGET Richard Henderson
` (11 subsequent siblings)
14 siblings, 2 replies; 62+ messages in thread
From: Richard Henderson @ 2025-02-03 3:18 UTC (permalink / raw)
To: qemu-devel; +Cc: pbonzini, mark.cave-ayland, berrange, philmd, thuth
No need to expand this function inline.
Unexport qemu_plugin_opts to match.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/qemu/plugin.h | 9 +--------
plugins/loader.c | 7 ++++++-
2 files changed, 7 insertions(+), 9 deletions(-)
diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h
index 9726a9ebf3..3efded6a3e 100644
--- a/include/qemu/plugin.h
+++ b/include/qemu/plugin.h
@@ -11,7 +11,6 @@
#include "qemu/qemu-plugin.h"
#include "qemu/error-report.h"
#include "qemu/queue.h"
-#include "qemu/option.h"
#include "qemu/plugin-event.h"
#include "qemu/bitmap.h"
#include "exec/memopidx.h"
@@ -44,13 +43,7 @@ get_plugin_meminfo_rw(qemu_plugin_meminfo_t i)
}
#ifdef CONFIG_PLUGIN
-extern QemuOptsList qemu_plugin_opts;
-
-static inline void qemu_plugin_add_opts(void)
-{
- qemu_add_opts(&qemu_plugin_opts);
-}
-
+void qemu_plugin_add_opts(void);
void qemu_plugin_opt_parse(const char *optstr, QemuPluginList *head);
int qemu_plugin_load_list(QemuPluginList *head, Error **errp);
diff --git a/plugins/loader.c b/plugins/loader.c
index ebc01da9c6..35680bfc13 100644
--- a/plugins/loader.c
+++ b/plugins/loader.c
@@ -55,7 +55,7 @@ struct qemu_plugin_parse_arg {
struct qemu_plugin_desc *curr;
};
-QemuOptsList qemu_plugin_opts = {
+static QemuOptsList qemu_plugin_opts = {
.name = "plugin",
.implied_opt_name = "file",
.head = QTAILQ_HEAD_INITIALIZER(qemu_plugin_opts.head),
@@ -65,6 +65,11 @@ QemuOptsList qemu_plugin_opts = {
},
};
+void qemu_plugin_add_opts(void)
+{
+ qemu_add_opts(&qemu_plugin_opts);
+}
+
typedef int (*qemu_plugin_install_func_t)(qemu_plugin_id_t, const qemu_info_t *, int, char **);
extern struct qemu_plugin_state plugin;
--
2.43.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v2 03/14] plugins: Uninline qemu_plugin_add_opts
2025-02-03 3:18 ` [PATCH v2 03/14] plugins: Uninline qemu_plugin_add_opts Richard Henderson
@ 2025-02-03 10:02 ` Thomas Huth
2025-02-03 11:44 ` Alex Bennée
1 sibling, 0 replies; 62+ messages in thread
From: Thomas Huth @ 2025-02-03 10:02 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
Cc: pbonzini, mark.cave-ayland, berrange, philmd
On 03/02/2025 04.18, Richard Henderson wrote:
> No need to expand this function inline.
> Unexport qemu_plugin_opts to match.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/qemu/plugin.h | 9 +--------
> plugins/loader.c | 7 ++++++-
> 2 files changed, 7 insertions(+), 9 deletions(-)
Reviewed-by: Thomas Huth <thuth@redhat.com>
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 03/14] plugins: Uninline qemu_plugin_add_opts
2025-02-03 3:18 ` [PATCH v2 03/14] plugins: Uninline qemu_plugin_add_opts Richard Henderson
2025-02-03 10:02 ` Thomas Huth
@ 2025-02-03 11:44 ` Alex Bennée
1 sibling, 0 replies; 62+ messages in thread
From: Alex Bennée @ 2025-02-03 11:44 UTC (permalink / raw)
To: Richard Henderson
Cc: qemu-devel, pbonzini, mark.cave-ayland, berrange, philmd, thuth
Richard Henderson <richard.henderson@linaro.org> writes:
> No need to expand this function inline.
> Unexport qemu_plugin_opts to match.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v2 04/14] meson: Introduce CONFIG_TCG_TARGET
2025-02-03 3:18 [PATCH v2 00/14] meson: Deprecate 32-bit host support Richard Henderson
` (2 preceding siblings ...)
2025-02-03 3:18 ` [PATCH v2 03/14] plugins: Uninline qemu_plugin_add_opts Richard Henderson
@ 2025-02-03 3:18 ` Richard Henderson
2025-02-03 10:08 ` Thomas Huth
2025-02-03 3:18 ` [PATCH v2 05/14] tcg: Link only when required in system mode Richard Henderson
` (10 subsequent siblings)
14 siblings, 1 reply; 62+ messages in thread
From: Richard Henderson @ 2025-02-03 3:18 UTC (permalink / raw)
To: qemu-devel; +Cc: pbonzini, mark.cave-ayland, berrange, philmd, thuth
Use CONFIG_TCG as a project-wide flag to indicate that TCG is enabled
for *some* target. Use CONFIG_TCG_TARGET to indicate that TCG is
enabled for a specific target.
Within a specific compilation unit, we can remap CONFIG_TCG based on
CONFIG_TCG_TARGET. This allows us to avoid changes to the bulk of
the code base.
Within meson.build, while CONFIG_TCG may be set in config_host_data,
it may not be set within config_target. Thus all references to
CONFIG_TCG in source_set 'when:' need not be updated.
For the moment, CONFIG_TCG and CONFIG_TCG_TARGET are identical.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/qemu/osdep.h | 7 +++++++
meson.build | 11 +++++++----
2 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
index 112ebdff21..1f6f73a148 100644
--- a/include/qemu/osdep.h
+++ b/include/qemu/osdep.h
@@ -34,9 +34,16 @@
#include "config-host.h"
#ifdef COMPILING_PER_TARGET
#include CONFIG_TARGET
+# ifdef CONFIG_TCG_TARGET
+# undef CONFIG_TCG_TARGET
+# else
+# undef CONFIG_TCG
+# endif
#else
#include "exec/poison.h"
#endif
+#pragma GCC poison CONFIG_TCG_TARGET
+
/*
* HOST_WORDS_BIGENDIAN was replaced with HOST_BIG_ENDIAN. Prevent it from
diff --git a/meson.build b/meson.build
index b72114819b..5ca3cc3f34 100644
--- a/meson.build
+++ b/meson.build
@@ -3270,11 +3270,14 @@ foreach target : target_dirs
target_kconfig = []
foreach sym: accelerators
- if sym == 'CONFIG_TCG' or target in accelerator_targets.get(sym, [])
- config_target += { sym: 'y' }
- config_all_accel += { sym: 'y' }
- target_kconfig += [ sym + '=y' ]
+ if sym == 'CONFIG_TCG'
+ config_target += { 'CONFIG_TCG_TARGET': 'y' }
+ elif target not in accelerator_targets.get(sym, [])
+ continue
endif
+ config_target += { sym: 'y' }
+ config_all_accel += { sym: 'y' }
+ target_kconfig += [ sym + '=y' ]
endforeach
if target_kconfig.length() == 0
if default_targets
--
2.43.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v2 04/14] meson: Introduce CONFIG_TCG_TARGET
2025-02-03 3:18 ` [PATCH v2 04/14] meson: Introduce CONFIG_TCG_TARGET Richard Henderson
@ 2025-02-03 10:08 ` Thomas Huth
2025-02-03 16:38 ` Richard Henderson
0 siblings, 1 reply; 62+ messages in thread
From: Thomas Huth @ 2025-02-03 10:08 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
Cc: pbonzini, mark.cave-ayland, berrange, philmd
On 03/02/2025 04.18, Richard Henderson wrote:
> Use CONFIG_TCG as a project-wide flag to indicate that TCG is enabled
> for *some* target. Use CONFIG_TCG_TARGET to indicate that TCG is
> enabled for a specific target.
>
> Within a specific compilation unit, we can remap CONFIG_TCG based on
> CONFIG_TCG_TARGET. This allows us to avoid changes to the bulk of
> the code base.
>
> Within meson.build, while CONFIG_TCG may be set in config_host_data,
> it may not be set within config_target. Thus all references to
> CONFIG_TCG in source_set 'when:' need not be updated.
>
> For the moment, CONFIG_TCG and CONFIG_TCG_TARGET are identical.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/qemu/osdep.h | 7 +++++++
> meson.build | 11 +++++++----
> 2 files changed, 14 insertions(+), 4 deletions(-)
>
> diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
> index 112ebdff21..1f6f73a148 100644
> --- a/include/qemu/osdep.h
> +++ b/include/qemu/osdep.h
> @@ -34,9 +34,16 @@
> #include "config-host.h"
> #ifdef COMPILING_PER_TARGET
> #include CONFIG_TARGET
> +# ifdef CONFIG_TCG_TARGET
> +# undef CONFIG_TCG_TARGET
> +# else
> +# undef CONFIG_TCG
> +# endif
> #else
> #include "exec/poison.h"
> #endif
> +#pragma GCC poison CONFIG_TCG_TARGET
Shouldn't that rather go before the "#endif" instead?
Also, would it be possible to rather adjust scripts/make-config-poison.sh
instead of poisoning this switch manually?
Thomas
>
> /*
> * HOST_WORDS_BIGENDIAN was replaced with HOST_BIG_ENDIAN. Prevent it from
> diff --git a/meson.build b/meson.build
> index b72114819b..5ca3cc3f34 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -3270,11 +3270,14 @@ foreach target : target_dirs
>
> target_kconfig = []
> foreach sym: accelerators
> - if sym == 'CONFIG_TCG' or target in accelerator_targets.get(sym, [])
> - config_target += { sym: 'y' }
> - config_all_accel += { sym: 'y' }
> - target_kconfig += [ sym + '=y' ]
> + if sym == 'CONFIG_TCG'
> + config_target += { 'CONFIG_TCG_TARGET': 'y' }
> + elif target not in accelerator_targets.get(sym, [])
> + continue
> endif
> + config_target += { sym: 'y' }
> + config_all_accel += { sym: 'y' }
> + target_kconfig += [ sym + '=y' ]
> endforeach
> if target_kconfig.length() == 0
> if default_targets
^ permalink raw reply [flat|nested] 62+ messages in thread* Re: [PATCH v2 04/14] meson: Introduce CONFIG_TCG_TARGET
2025-02-03 10:08 ` Thomas Huth
@ 2025-02-03 16:38 ` Richard Henderson
2025-02-04 6:41 ` Thomas Huth
0 siblings, 1 reply; 62+ messages in thread
From: Richard Henderson @ 2025-02-03 16:38 UTC (permalink / raw)
To: Thomas Huth, qemu-devel; +Cc: pbonzini, mark.cave-ayland, berrange, philmd
On 2/3/25 02:08, Thomas Huth wrote:
> On 03/02/2025 04.18, Richard Henderson wrote:
>> Use CONFIG_TCG as a project-wide flag to indicate that TCG is enabled
>> for *some* target. Use CONFIG_TCG_TARGET to indicate that TCG is
>> enabled for a specific target.
>>
>> Within a specific compilation unit, we can remap CONFIG_TCG based on
>> CONFIG_TCG_TARGET. This allows us to avoid changes to the bulk of
>> the code base.
>>
>> Within meson.build, while CONFIG_TCG may be set in config_host_data,
>> it may not be set within config_target. Thus all references to
>> CONFIG_TCG in source_set 'when:' need not be updated.
>>
>> For the moment, CONFIG_TCG and CONFIG_TCG_TARGET are identical.
>>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>> include/qemu/osdep.h | 7 +++++++
>> meson.build | 11 +++++++----
>> 2 files changed, 14 insertions(+), 4 deletions(-)
>>
>> diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
>> index 112ebdff21..1f6f73a148 100644
>> --- a/include/qemu/osdep.h
>> +++ b/include/qemu/osdep.h
>> @@ -34,9 +34,16 @@
>> #include "config-host.h"
>> #ifdef COMPILING_PER_TARGET
>> #include CONFIG_TARGET
>> +# ifdef CONFIG_TCG_TARGET
>> +# undef CONFIG_TCG_TARGET
>> +# else
>> +# undef CONFIG_TCG
>> +# endif
>> #else
>> #include "exec/poison.h"
>> #endif
>> +#pragma GCC poison CONFIG_TCG_TARGET
>
> Shouldn't that rather go before the "#endif" instead?
>
> Also, would it be possible to rather adjust scripts/make-config-poison.sh instead of
> poisoning this switch manually?
No, I want to unconditionally poison it so that no other uses are ever introduced.
r~
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 04/14] meson: Introduce CONFIG_TCG_TARGET
2025-02-03 16:38 ` Richard Henderson
@ 2025-02-04 6:41 ` Thomas Huth
0 siblings, 0 replies; 62+ messages in thread
From: Thomas Huth @ 2025-02-04 6:41 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
Cc: pbonzini, mark.cave-ayland, berrange, philmd
On 03/02/2025 17.38, Richard Henderson wrote:
> On 2/3/25 02:08, Thomas Huth wrote:
>> On 03/02/2025 04.18, Richard Henderson wrote:
>>> Use CONFIG_TCG as a project-wide flag to indicate that TCG is enabled
>>> for *some* target. Use CONFIG_TCG_TARGET to indicate that TCG is
>>> enabled for a specific target.
>>>
>>> Within a specific compilation unit, we can remap CONFIG_TCG based on
>>> CONFIG_TCG_TARGET. This allows us to avoid changes to the bulk of
>>> the code base.
>>>
>>> Within meson.build, while CONFIG_TCG may be set in config_host_data,
>>> it may not be set within config_target. Thus all references to
>>> CONFIG_TCG in source_set 'when:' need not be updated.
>>>
>>> For the moment, CONFIG_TCG and CONFIG_TCG_TARGET are identical.
>>>
>>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>>> ---
>>> include/qemu/osdep.h | 7 +++++++
>>> meson.build | 11 +++++++----
>>> 2 files changed, 14 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
>>> index 112ebdff21..1f6f73a148 100644
>>> --- a/include/qemu/osdep.h
>>> +++ b/include/qemu/osdep.h
>>> @@ -34,9 +34,16 @@
>>> #include "config-host.h"
>>> #ifdef COMPILING_PER_TARGET
>>> #include CONFIG_TARGET
>>> +# ifdef CONFIG_TCG_TARGET
>>> +# undef CONFIG_TCG_TARGET
>>> +# else
>>> +# undef CONFIG_TCG
>>> +# endif
>>> #else
>>> #include "exec/poison.h"
>>> #endif
>>> +#pragma GCC poison CONFIG_TCG_TARGET
>>
>> Shouldn't that rather go before the "#endif" instead?
>>
>> Also, would it be possible to rather adjust scripts/make-config-poison.sh
>> instead of poisoning this switch manually?
>
> No, I want to unconditionally poison it so that no other uses are ever
> introduced.
Ok, but then I think you should put a comment in front of it, explaining the
rationale, since it is not so obvious (at least it was not obvious for me
when I read the patch).
Thanks,
Thomas
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v2 05/14] tcg: Link only when required in system mode
2025-02-03 3:18 [PATCH v2 00/14] meson: Deprecate 32-bit host support Richard Henderson
` (3 preceding siblings ...)
2025-02-03 3:18 ` [PATCH v2 04/14] meson: Introduce CONFIG_TCG_TARGET Richard Henderson
@ 2025-02-03 3:18 ` Richard Henderson
2025-02-03 10:15 ` Thomas Huth
2025-02-03 11:48 ` Alex Bennée
2025-02-03 3:18 ` [PATCH v2 06/14] plugins: " Richard Henderson
` (9 subsequent siblings)
14 siblings, 2 replies; 62+ messages in thread
From: Richard Henderson @ 2025-02-03 3:18 UTC (permalink / raw)
To: qemu-devel; +Cc: pbonzini, mark.cave-ayland, berrange, philmd, thuth
Rather than unconditional linkage via system_ss, conditinally
include the static library via specific_ss. This will elide
the code when CONFIG_TCG is disabled for a specific target.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/meson.build | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/tcg/meson.build b/tcg/meson.build
index 2977df5862..8266bcb324 100644
--- a/tcg/meson.build
+++ b/tcg/meson.build
@@ -49,4 +49,8 @@ libtcg_system = static_library('tcg_system',
tcg_system = declare_dependency(objects: libtcg_system.extract_all_objects(recursive: false),
dependencies: tcg_ss.dependencies())
-system_ss.add(tcg_system)
+
+specific_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: tcg_system)
+if host_os == 'linux'
+ specific_ss.add(when: 'CONFIG_TCG', if_false: files('perf-stubs.c'))
+endif
--
2.43.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v2 05/14] tcg: Link only when required in system mode
2025-02-03 3:18 ` [PATCH v2 05/14] tcg: Link only when required in system mode Richard Henderson
@ 2025-02-03 10:15 ` Thomas Huth
2025-02-03 11:48 ` Alex Bennée
1 sibling, 0 replies; 62+ messages in thread
From: Thomas Huth @ 2025-02-03 10:15 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
Cc: pbonzini, mark.cave-ayland, berrange, philmd
On 03/02/2025 04.18, Richard Henderson wrote:
> Rather than unconditional linkage via system_ss, conditinally
> include the static library via specific_ss. This will elide
> the code when CONFIG_TCG is disabled for a specific target.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> tcg/meson.build | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/tcg/meson.build b/tcg/meson.build
> index 2977df5862..8266bcb324 100644
> --- a/tcg/meson.build
> +++ b/tcg/meson.build
> @@ -49,4 +49,8 @@ libtcg_system = static_library('tcg_system',
>
> tcg_system = declare_dependency(objects: libtcg_system.extract_all_objects(recursive: false),
> dependencies: tcg_ss.dependencies())
> -system_ss.add(tcg_system)
> +
> +specific_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: tcg_system)
> +if host_os == 'linux'
> + specific_ss.add(when: 'CONFIG_TCG', if_false: files('perf-stubs.c'))
> +endif
Reviewed-by: Thomas Huth <thuth@redhat.com>
^ permalink raw reply [flat|nested] 62+ messages in thread* Re: [PATCH v2 05/14] tcg: Link only when required in system mode
2025-02-03 3:18 ` [PATCH v2 05/14] tcg: Link only when required in system mode Richard Henderson
2025-02-03 10:15 ` Thomas Huth
@ 2025-02-03 11:48 ` Alex Bennée
1 sibling, 0 replies; 62+ messages in thread
From: Alex Bennée @ 2025-02-03 11:48 UTC (permalink / raw)
To: Richard Henderson
Cc: qemu-devel, pbonzini, mark.cave-ayland, berrange, philmd, thuth
Richard Henderson <richard.henderson@linaro.org> writes:
> Rather than unconditional linkage via system_ss, conditinally
> include the static library via specific_ss. This will elide
> the code when CONFIG_TCG is disabled for a specific target.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v2 06/14] plugins: Link only when required in system mode
2025-02-03 3:18 [PATCH v2 00/14] meson: Deprecate 32-bit host support Richard Henderson
` (4 preceding siblings ...)
2025-02-03 3:18 ` [PATCH v2 05/14] tcg: Link only when required in system mode Richard Henderson
@ 2025-02-03 3:18 ` Richard Henderson
2025-02-03 10:16 ` Thomas Huth
2025-02-03 11:49 ` Alex Bennée
2025-02-03 3:18 ` [PATCH v2 07/14] accel/stubs: Expand stubs for TCG Richard Henderson
` (8 subsequent siblings)
14 siblings, 2 replies; 62+ messages in thread
From: Richard Henderson @ 2025-02-03 3:18 UTC (permalink / raw)
To: qemu-devel; +Cc: pbonzini, mark.cave-ayland, berrange, philmd, thuth
Provide out-of-line versions of some of the qemu/plugin.h API.
These will be referenced with --enable-plugin, but CONFIG_TCG
is disabled for a specific target.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
plugins/stubs.c | 49 +++++++++++++++++++++++++++++++++++++++++++++
plugins/meson.build | 5 ++++-
2 files changed, 53 insertions(+), 1 deletion(-)
create mode 100644 plugins/stubs.c
diff --git a/plugins/stubs.c b/plugins/stubs.c
new file mode 100644
index 0000000000..57af8357e4
--- /dev/null
+++ b/plugins/stubs.c
@@ -0,0 +1,49 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Stubs for when CONFIG_PLUGIN is enabled generally, but
+ * CONFIG_TCG_TARGET is disabled for a specific target.
+ * This will only be the case for 64-bit guests on 32-bit hosts
+ * when an alternate accelerator is enabled.
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/plugin.h"
+#include "qapi/error.h"
+
+
+void qemu_plugin_add_opts(void)
+{
+}
+
+void qemu_plugin_opt_parse(const char *optstr, QemuPluginList *head)
+{
+ error_report("plugin interface not enabled in this build");
+ exit(1);
+}
+
+int qemu_plugin_load_list(QemuPluginList *head, Error **errp)
+{
+ return 0;
+}
+
+void qemu_plugin_vcpu_init_hook(CPUState *cpu)
+{
+}
+
+void qemu_plugin_vcpu_exit_hook(CPUState *cpu)
+{
+}
+
+void qemu_plugin_vcpu_idle_cb(CPUState *cpu)
+{
+}
+
+void qemu_plugin_vcpu_resume_cb(CPUState *cpu)
+{
+}
+
+CPUPluginState *qemu_plugin_create_vcpu_state(void)
+{
+ /* Protected by tcg_enabled() */
+ g_assert_not_reached();
+}
diff --git a/plugins/meson.build b/plugins/meson.build
index d60be2a4d6..42442fe22b 100644
--- a/plugins/meson.build
+++ b/plugins/meson.build
@@ -57,8 +57,11 @@ if host_os == 'windows'
command: dlltool_cmd
)
endif
-specific_ss.add(files(
+
+specific_ss.add(when: 'CONFIG_TCG', if_true: files(
'loader.c',
'core.c',
'api.c',
+), if_false: files(
+ 'stubs.c'
))
--
2.43.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v2 06/14] plugins: Link only when required in system mode
2025-02-03 3:18 ` [PATCH v2 06/14] plugins: " Richard Henderson
@ 2025-02-03 10:16 ` Thomas Huth
2025-02-03 11:49 ` Alex Bennée
1 sibling, 0 replies; 62+ messages in thread
From: Thomas Huth @ 2025-02-03 10:16 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
Cc: pbonzini, mark.cave-ayland, berrange, philmd
On 03/02/2025 04.18, Richard Henderson wrote:
> Provide out-of-line versions of some of the qemu/plugin.h API.
> These will be referenced with --enable-plugin, but CONFIG_TCG
> is disabled for a specific target.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> plugins/stubs.c | 49 +++++++++++++++++++++++++++++++++++++++++++++
> plugins/meson.build | 5 ++++-
> 2 files changed, 53 insertions(+), 1 deletion(-)
> create mode 100644 plugins/stubs.c
Reviewed-by: Thomas Huth <thuth@redhat.com>
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 06/14] plugins: Link only when required in system mode
2025-02-03 3:18 ` [PATCH v2 06/14] plugins: " Richard Henderson
2025-02-03 10:16 ` Thomas Huth
@ 2025-02-03 11:49 ` Alex Bennée
1 sibling, 0 replies; 62+ messages in thread
From: Alex Bennée @ 2025-02-03 11:49 UTC (permalink / raw)
To: Richard Henderson
Cc: qemu-devel, pbonzini, mark.cave-ayland, berrange, philmd, thuth
Richard Henderson <richard.henderson@linaro.org> writes:
> Provide out-of-line versions of some of the qemu/plugin.h API.
> These will be referenced with --enable-plugin, but CONFIG_TCG
> is disabled for a specific target.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v2 07/14] accel/stubs: Expand stubs for TCG
2025-02-03 3:18 [PATCH v2 00/14] meson: Deprecate 32-bit host support Richard Henderson
` (5 preceding siblings ...)
2025-02-03 3:18 ` [PATCH v2 06/14] plugins: " Richard Henderson
@ 2025-02-03 3:18 ` Richard Henderson
2025-02-03 10:22 ` Thomas Huth
2025-02-03 3:18 ` [PATCH v2 08/14] target/mips: Protect objects with CONFIG_TCG Richard Henderson
` (7 subsequent siblings)
14 siblings, 1 reply; 62+ messages in thread
From: Richard Henderson @ 2025-02-03 3:18 UTC (permalink / raw)
To: qemu-devel; +Cc: pbonzini, mark.cave-ayland, berrange, philmd, thuth
Add tcg_allowed, qmp_x_query_jit, qmp_x_query_opcount.
These are referenced when CONFIG_TCG is enabled globally,
but not for a specific target.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/stubs/tcg-stub.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c
index 7f4208fddf..9c2e2dc6e1 100644
--- a/accel/stubs/tcg-stub.c
+++ b/accel/stubs/tcg-stub.c
@@ -13,6 +13,18 @@
#include "qemu/osdep.h"
#include "exec/tb-flush.h"
#include "exec/exec-all.h"
+#include "qapi/error.h"
+
+/*
+ * This file *ought* to be built once and linked only when required.
+ * However, it is built per-target, which means qemu/osdep.h has already
+ * undef'ed CONFIG_TCG, which hides the auto-generated declaration.
+ */
+#define CONFIG_TCG
+#include "qapi/qapi-commands-machine.h"
+
+
+const bool tcg_allowed = false;
void tb_flush(CPUState *cpu)
{
@@ -27,3 +39,15 @@ G_NORETURN void cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc)
{
g_assert_not_reached();
}
+
+HumanReadableText *qmp_x_query_jit(Error **errp)
+{
+ error_setg(errp, "JIT information is only available with accel=tcg");
+ return NULL;
+}
+
+HumanReadableText *qmp_x_query_opcount(Error **errp)
+{
+ error_setg(errp, "Opcode count information is only available with accel=tcg");
+ return NULL;
+}
--
2.43.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v2 07/14] accel/stubs: Expand stubs for TCG
2025-02-03 3:18 ` [PATCH v2 07/14] accel/stubs: Expand stubs for TCG Richard Henderson
@ 2025-02-03 10:22 ` Thomas Huth
2025-02-03 16:43 ` Richard Henderson
0 siblings, 1 reply; 62+ messages in thread
From: Thomas Huth @ 2025-02-03 10:22 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
Cc: pbonzini, mark.cave-ayland, berrange, philmd
On 03/02/2025 04.18, Richard Henderson wrote:
> Add tcg_allowed, qmp_x_query_jit, qmp_x_query_opcount.
> These are referenced when CONFIG_TCG is enabled globally,
> but not for a specific target.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/stubs/tcg-stub.c | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c
> index 7f4208fddf..9c2e2dc6e1 100644
> --- a/accel/stubs/tcg-stub.c
> +++ b/accel/stubs/tcg-stub.c
> @@ -13,6 +13,18 @@
> #include "qemu/osdep.h"
> #include "exec/tb-flush.h"
> #include "exec/exec-all.h"
> +#include "qapi/error.h"
> +
> +/*
> + * This file *ought* to be built once and linked only when required.
> + * However, it is built per-target, which means qemu/osdep.h has already
> + * undef'ed CONFIG_TCG, which hides the auto-generated declaration.
So why don't we only build this file once?
Thomas
> + */
> +#define CONFIG_TCG
> +#include "qapi/qapi-commands-machine.h"
> +
> +
> +const bool tcg_allowed = false;
>
> void tb_flush(CPUState *cpu)
> {
> @@ -27,3 +39,15 @@ G_NORETURN void cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc)
> {
> g_assert_not_reached();
> }
> +
> +HumanReadableText *qmp_x_query_jit(Error **errp)
> +{
> + error_setg(errp, "JIT information is only available with accel=tcg");
> + return NULL;
> +}
> +
> +HumanReadableText *qmp_x_query_opcount(Error **errp)
> +{
> + error_setg(errp, "Opcode count information is only available with accel=tcg");
> + return NULL;
> +}
^ permalink raw reply [flat|nested] 62+ messages in thread* Re: [PATCH v2 07/14] accel/stubs: Expand stubs for TCG
2025-02-03 10:22 ` Thomas Huth
@ 2025-02-03 16:43 ` Richard Henderson
2025-02-03 17:38 ` Thomas Huth
0 siblings, 1 reply; 62+ messages in thread
From: Richard Henderson @ 2025-02-03 16:43 UTC (permalink / raw)
To: Thomas Huth, qemu-devel; +Cc: pbonzini, mark.cave-ayland, berrange, philmd
On 2/3/25 02:22, Thomas Huth wrote:
> On 03/02/2025 04.18, Richard Henderson wrote:
>> Add tcg_allowed, qmp_x_query_jit, qmp_x_query_opcount.
>> These are referenced when CONFIG_TCG is enabled globally,
>> but not for a specific target.
>>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>> accel/stubs/tcg-stub.c | 24 ++++++++++++++++++++++++
>> 1 file changed, 24 insertions(+)
>>
>> diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c
>> index 7f4208fddf..9c2e2dc6e1 100644
>> --- a/accel/stubs/tcg-stub.c
>> +++ b/accel/stubs/tcg-stub.c
>> @@ -13,6 +13,18 @@
>> #include "qemu/osdep.h"
>> #include "exec/tb-flush.h"
>> #include "exec/exec-all.h"
>> +#include "qapi/error.h"
>> +
>> +/*
>> + * This file *ought* to be built once and linked only when required.
>> + * However, it is built per-target, which means qemu/osdep.h has already
>> + * undef'ed CONFIG_TCG, which hides the auto-generated declaration.
>
> So why don't we only build this file once?
I think we'd have to create a static library for it.
It didn't seem worth the effort at the time.
I can re-investigate if you like.
r~
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 07/14] accel/stubs: Expand stubs for TCG
2025-02-03 16:43 ` Richard Henderson
@ 2025-02-03 17:38 ` Thomas Huth
2025-02-03 20:00 ` Richard Henderson
0 siblings, 1 reply; 62+ messages in thread
From: Thomas Huth @ 2025-02-03 17:38 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
Cc: pbonzini, mark.cave-ayland, berrange, philmd
On 03/02/2025 17.43, Richard Henderson wrote:
> On 2/3/25 02:22, Thomas Huth wrote:
>> On 03/02/2025 04.18, Richard Henderson wrote:
>>> Add tcg_allowed, qmp_x_query_jit, qmp_x_query_opcount.
>>> These are referenced when CONFIG_TCG is enabled globally,
>>> but not for a specific target.
>>>
>>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>>> ---
>>> accel/stubs/tcg-stub.c | 24 ++++++++++++++++++++++++
>>> 1 file changed, 24 insertions(+)
>>>
>>> diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c
>>> index 7f4208fddf..9c2e2dc6e1 100644
>>> --- a/accel/stubs/tcg-stub.c
>>> +++ b/accel/stubs/tcg-stub.c
>>> @@ -13,6 +13,18 @@
>>> #include "qemu/osdep.h"
>>> #include "exec/tb-flush.h"
>>> #include "exec/exec-all.h"
>>> +#include "qapi/error.h"
>>> +
>>> +/*
>>> + * This file *ought* to be built once and linked only when required.
>>> + * However, it is built per-target, which means qemu/osdep.h has already
>>> + * undef'ed CONFIG_TCG, which hides the auto-generated declaration.
>>
>> So why don't we only build this file once?
>
> I think we'd have to create a static library for it.
> It didn't seem worth the effort at the time.
> I can re-investigate if you like.
I think something like this might work:
diff --git a/accel/stubs/meson.build b/accel/stubs/meson.build
--- a/accel/stubs/meson.build
+++ b/accel/stubs/meson.build
@@ -1,6 +1,9 @@
system_stubs_ss = ss.source_set()
-system_stubs_ss.add(when: 'CONFIG_XEN', if_false: files('xen-stub.c'))
-system_stubs_ss.add(when: 'CONFIG_KVM', if_false: files('kvm-stub.c'))
system_stubs_ss.add(when: 'CONFIG_TCG', if_false: files('tcg-stub.c'))
+system_ss.add_all(when: ['CONFIG_SYSTEM_ONLY'], if_true: system_stubs_ss)
+
+specific_stubs_ss = ss.source_set()
+specific_stubs_ss.add(when: 'CONFIG_XEN', if_false: files('xen-stub.c'))
+specific_stubs_ss.add(when: 'CONFIG_KVM', if_false: files('kvm-stub.c'))
+specific_ss.add_all(when: ['CONFIG_SYSTEM_ONLY'], if_true: specific_stubs_ss)
-specific_ss.add_all(when: ['CONFIG_SYSTEM_ONLY'], if_true: system_stubs_ss)
?
Thomas
^ permalink raw reply [flat|nested] 62+ messages in thread* Re: [PATCH v2 07/14] accel/stubs: Expand stubs for TCG
2025-02-03 17:38 ` Thomas Huth
@ 2025-02-03 20:00 ` Richard Henderson
0 siblings, 0 replies; 62+ messages in thread
From: Richard Henderson @ 2025-02-03 20:00 UTC (permalink / raw)
To: Thomas Huth, qemu-devel; +Cc: pbonzini, mark.cave-ayland, berrange, philmd
On 2/3/25 09:38, Thomas Huth wrote:
> On 03/02/2025 17.43, Richard Henderson wrote:
>> On 2/3/25 02:22, Thomas Huth wrote:
>>> On 03/02/2025 04.18, Richard Henderson wrote:
>>>> Add tcg_allowed, qmp_x_query_jit, qmp_x_query_opcount.
>>>> These are referenced when CONFIG_TCG is enabled globally,
>>>> but not for a specific target.
>>>>
>>>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>>>> ---
>>>> accel/stubs/tcg-stub.c | 24 ++++++++++++++++++++++++
>>>> 1 file changed, 24 insertions(+)
>>>>
>>>> diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c
>>>> index 7f4208fddf..9c2e2dc6e1 100644
>>>> --- a/accel/stubs/tcg-stub.c
>>>> +++ b/accel/stubs/tcg-stub.c
>>>> @@ -13,6 +13,18 @@
>>>> #include "qemu/osdep.h"
>>>> #include "exec/tb-flush.h"
>>>> #include "exec/exec-all.h"
>>>> +#include "qapi/error.h"
>>>> +
>>>> +/*
>>>> + * This file *ought* to be built once and linked only when required.
>>>> + * However, it is built per-target, which means qemu/osdep.h has already
>>>> + * undef'ed CONFIG_TCG, which hides the auto-generated declaration.
>>>
>>> So why don't we only build this file once?
>>
>> I think we'd have to create a static library for it.
>> It didn't seem worth the effort at the time.
>> I can re-investigate if you like.
>
> I think something like this might work:
I think we need some of Philippe's include/exec/ cleanup work first. We currently use
exec/exec-all.h, which requires cpu.h, which requires building per-target.
r~
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v2 08/14] target/mips: Protect objects with CONFIG_TCG
2025-02-03 3:18 [PATCH v2 00/14] meson: Deprecate 32-bit host support Richard Henderson
` (6 preceding siblings ...)
2025-02-03 3:18 ` [PATCH v2 07/14] accel/stubs: Expand stubs for TCG Richard Henderson
@ 2025-02-03 3:18 ` Richard Henderson
2025-02-03 10:24 ` Thomas Huth
2025-02-03 17:25 ` Philippe Mathieu-Daudé
2025-02-03 3:18 ` [PATCH v2 09/14] gitlab: Replace aarch64 with arm in cross-i686-tci build Richard Henderson
` (6 subsequent siblings)
14 siblings, 2 replies; 62+ messages in thread
From: Richard Henderson @ 2025-02-03 3:18 UTC (permalink / raw)
To: qemu-devel; +Cc: pbonzini, mark.cave-ayland, berrange, philmd, thuth
Hack around mips32 host allowing kvm acceleration
of mips64 guest, but tcg is disabled.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/mips/tcg/meson.build | 4 ++--
target/mips/tcg/system/meson.build | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/target/mips/tcg/meson.build b/target/mips/tcg/meson.build
index fff9cd6c7f..e5574f177b 100644
--- a/target/mips/tcg/meson.build
+++ b/target/mips/tcg/meson.build
@@ -10,7 +10,7 @@ gen = [
]
mips_ss.add(gen)
-mips_ss.add(files(
+mips_ss.add(when: 'CONFIG_TCG', if_true: files(
'dsp_helper.c',
'exception.c',
'fpu_helper.c',
@@ -26,7 +26,7 @@ mips_ss.add(files(
'vr54xx_helper.c',
'vr54xx_translate.c',
))
-mips_ss.add(when: 'TARGET_MIPS64', if_true: files(
+mips_ss.add(when: ['CONFIG_TCG', 'TARGET_MIPS64'], if_true: files(
'tx79_translate.c',
'octeon_translate.c',
'lcsr_translate.c',
diff --git a/target/mips/tcg/system/meson.build b/target/mips/tcg/system/meson.build
index 911341ac37..606ccacebc 100644
--- a/target/mips/tcg/system/meson.build
+++ b/target/mips/tcg/system/meson.build
@@ -1,12 +1,12 @@
-mips_system_ss.add(files(
+mips_system_ss.add(when: 'CONFIG_TCG', if_true: files(
'cp0_helper.c',
'special_helper.c',
'tlb_helper.c',
))
-mips_system_ss.add(when: ['CONFIG_SEMIHOSTING'],
+mips_system_ss.add(when: ['CONFIG_TCG', 'CONFIG_SEMIHOSTING'],
if_true: files('mips-semi.c'),
if_false: files('semihosting-stub.c')
)
-mips_system_ss.add(when: 'TARGET_MIPS64', if_true: files(
+mips_system_ss.add(when: ['CONFIG_TCG', 'TARGET_MIPS64'], if_true: files(
'lcsr_helper.c',
))
--
2.43.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v2 08/14] target/mips: Protect objects with CONFIG_TCG
2025-02-03 3:18 ` [PATCH v2 08/14] target/mips: Protect objects with CONFIG_TCG Richard Henderson
@ 2025-02-03 10:24 ` Thomas Huth
2025-02-03 17:25 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 62+ messages in thread
From: Thomas Huth @ 2025-02-03 10:24 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
Cc: pbonzini, mark.cave-ayland, berrange, philmd
On 03/02/2025 04.18, Richard Henderson wrote:
> Hack around mips32 host allowing kvm acceleration
> of mips64 guest, but tcg is disabled.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/mips/tcg/meson.build | 4 ++--
> target/mips/tcg/system/meson.build | 6 +++---
> 2 files changed, 5 insertions(+), 5 deletions(-)
Reviewed-by: Thomas Huth <thuth@redhat.com>
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 08/14] target/mips: Protect objects with CONFIG_TCG
2025-02-03 3:18 ` [PATCH v2 08/14] target/mips: Protect objects with CONFIG_TCG Richard Henderson
2025-02-03 10:24 ` Thomas Huth
@ 2025-02-03 17:25 ` Philippe Mathieu-Daudé
2025-02-03 18:01 ` Richard Henderson
1 sibling, 1 reply; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-02-03 17:25 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: pbonzini, mark.cave-ayland, berrange, thuth
Hi Richard,
On 3/2/25 04:18, Richard Henderson wrote:
> Hack around mips32 host allowing kvm acceleration
> of mips64 guest, but tcg is disabled.
We have in target/mips/meson.build:
if 'CONFIG_TCG' in config_all_accel
subdir('tcg')
endif
What is the problem you are trying to address here?
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/mips/tcg/meson.build | 4 ++--
> target/mips/tcg/system/meson.build | 6 +++---
> 2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/target/mips/tcg/meson.build b/target/mips/tcg/meson.build
> index fff9cd6c7f..e5574f177b 100644
> --- a/target/mips/tcg/meson.build
> +++ b/target/mips/tcg/meson.build
> @@ -10,7 +10,7 @@ gen = [
> ]
>
> mips_ss.add(gen)
> -mips_ss.add(files(
> +mips_ss.add(when: 'CONFIG_TCG', if_true: files(
> 'dsp_helper.c',
> 'exception.c',
> 'fpu_helper.c',
> @@ -26,7 +26,7 @@ mips_ss.add(files(
> 'vr54xx_helper.c',
> 'vr54xx_translate.c',
> ))
> -mips_ss.add(when: 'TARGET_MIPS64', if_true: files(
> +mips_ss.add(when: ['CONFIG_TCG', 'TARGET_MIPS64'], if_true: files(
> 'tx79_translate.c',
> 'octeon_translate.c',
> 'lcsr_translate.c',
> diff --git a/target/mips/tcg/system/meson.build b/target/mips/tcg/system/meson.build
> index 911341ac37..606ccacebc 100644
> --- a/target/mips/tcg/system/meson.build
> +++ b/target/mips/tcg/system/meson.build
> @@ -1,12 +1,12 @@
> -mips_system_ss.add(files(
> +mips_system_ss.add(when: 'CONFIG_TCG', if_true: files(
> 'cp0_helper.c',
> 'special_helper.c',
> 'tlb_helper.c',
> ))
> -mips_system_ss.add(when: ['CONFIG_SEMIHOSTING'],
> +mips_system_ss.add(when: ['CONFIG_TCG', 'CONFIG_SEMIHOSTING'],
> if_true: files('mips-semi.c'),
> if_false: files('semihosting-stub.c')
> )
> -mips_system_ss.add(when: 'TARGET_MIPS64', if_true: files(
> +mips_system_ss.add(when: ['CONFIG_TCG', 'TARGET_MIPS64'], if_true: files(
> 'lcsr_helper.c',
> ))
^ permalink raw reply [flat|nested] 62+ messages in thread* Re: [PATCH v2 08/14] target/mips: Protect objects with CONFIG_TCG
2025-02-03 17:25 ` Philippe Mathieu-Daudé
@ 2025-02-03 18:01 ` Richard Henderson
0 siblings, 0 replies; 62+ messages in thread
From: Richard Henderson @ 2025-02-03 18:01 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: pbonzini, mark.cave-ayland, berrange, thuth
On 2/3/25 09:25, Philippe Mathieu-Daudé wrote:
> Hi Richard,
>
> On 3/2/25 04:18, Richard Henderson wrote:
>> Hack around mips32 host allowing kvm acceleration
>> of mips64 guest, but tcg is disabled.
>
> We have in target/mips/meson.build:
>
> if 'CONFIG_TCG' in config_all_accel
> subdir('tcg')
> endif
>
> What is the problem you are trying to address here?
That test is for CONFIG_TCG enabled for *any* target (config_all_accel).
E.g. qemu-system-mips on mipsel host has TCG enabled.
>> +mips_ss.add(when: 'CONFIG_TCG', if_true: files(
This test is for CONFIG_TCG enabled for a specific target (config_target).
E.g. qemu-system-mips64 on mipsel host does not have TCG enabled.
But it does have kvm enabled, so the target isn't entirely disabled.
Paolo's reply to the cover suggests this usage might be killable as well, so that we
require a mips64el host to spawn mips64el guests, and all of this goes away.
r~
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v2 09/14] gitlab: Replace aarch64 with arm in cross-i686-tci build
2025-02-03 3:18 [PATCH v2 00/14] meson: Deprecate 32-bit host support Richard Henderson
` (7 preceding siblings ...)
2025-02-03 3:18 ` [PATCH v2 08/14] target/mips: Protect objects with CONFIG_TCG Richard Henderson
@ 2025-02-03 3:18 ` Richard Henderson
2025-02-03 10:30 ` Thomas Huth
2025-02-03 12:31 ` Alex Bennée
2025-02-03 3:18 ` [PATCH v2 10/14] configure: Define TARGET_LONG_BITS in configs/targets/*.mak Richard Henderson
` (5 subsequent siblings)
14 siblings, 2 replies; 62+ messages in thread
From: Richard Henderson @ 2025-02-03 3:18 UTC (permalink / raw)
To: qemu-devel; +Cc: pbonzini, mark.cave-ayland, berrange, philmd, thuth
Configuration of 64-bit host on 32-bit guest will shortly
be denied. Use a 32-bit guest instead.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
.gitlab-ci.d/crossbuilds.yml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/.gitlab-ci.d/crossbuilds.yml b/.gitlab-ci.d/crossbuilds.yml
index 95dfc39224..7ae0f966f1 100644
--- a/.gitlab-ci.d/crossbuilds.yml
+++ b/.gitlab-ci.d/crossbuilds.yml
@@ -61,7 +61,7 @@ cross-i686-tci:
variables:
IMAGE: debian-i686-cross
ACCEL: tcg-interpreter
- EXTRA_CONFIGURE_OPTS: --target-list=i386-softmmu,i386-linux-user,aarch64-softmmu,aarch64-linux-user,ppc-softmmu,ppc-linux-user --disable-plugins --disable-kvm
+ EXTRA_CONFIGURE_OPTS: --target-list=i386-softmmu,i386-linux-user,arm-softmmu,arm-linux-user,ppc-softmmu,ppc-linux-user --disable-plugins --disable-kvm
# Force tests to run with reduced parallelism, to see whether this
# reduces the flakiness of this CI job. The CI
# environment by default shows us 8 CPUs and so we
--
2.43.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v2 09/14] gitlab: Replace aarch64 with arm in cross-i686-tci build
2025-02-03 3:18 ` [PATCH v2 09/14] gitlab: Replace aarch64 with arm in cross-i686-tci build Richard Henderson
@ 2025-02-03 10:30 ` Thomas Huth
2025-02-03 12:31 ` Alex Bennée
1 sibling, 0 replies; 62+ messages in thread
From: Thomas Huth @ 2025-02-03 10:30 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
Cc: pbonzini, mark.cave-ayland, berrange, philmd
On 03/02/2025 04.18, Richard Henderson wrote:
> Configuration of 64-bit host on 32-bit guest will shortly
> be denied. Use a 32-bit guest instead.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> .gitlab-ci.d/crossbuilds.yml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/.gitlab-ci.d/crossbuilds.yml b/.gitlab-ci.d/crossbuilds.yml
> index 95dfc39224..7ae0f966f1 100644
> --- a/.gitlab-ci.d/crossbuilds.yml
> +++ b/.gitlab-ci.d/crossbuilds.yml
> @@ -61,7 +61,7 @@ cross-i686-tci:
> variables:
> IMAGE: debian-i686-cross
> ACCEL: tcg-interpreter
> - EXTRA_CONFIGURE_OPTS: --target-list=i386-softmmu,i386-linux-user,aarch64-softmmu,aarch64-linux-user,ppc-softmmu,ppc-linux-user --disable-plugins --disable-kvm
> + EXTRA_CONFIGURE_OPTS: --target-list=i386-softmmu,i386-linux-user,arm-softmmu,arm-linux-user,ppc-softmmu,ppc-linux-user --disable-plugins --disable-kvm
> # Force tests to run with reduced parallelism, to see whether this
> # reduces the flakiness of this CI job. The CI
> # environment by default shows us 8 CPUs and so we
Reviewed-by: Thomas Huth <thuth@redhat.com>
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 09/14] gitlab: Replace aarch64 with arm in cross-i686-tci build
2025-02-03 3:18 ` [PATCH v2 09/14] gitlab: Replace aarch64 with arm in cross-i686-tci build Richard Henderson
2025-02-03 10:30 ` Thomas Huth
@ 2025-02-03 12:31 ` Alex Bennée
1 sibling, 0 replies; 62+ messages in thread
From: Alex Bennée @ 2025-02-03 12:31 UTC (permalink / raw)
To: Richard Henderson
Cc: qemu-devel, pbonzini, mark.cave-ayland, berrange, philmd, thuth
Richard Henderson <richard.henderson@linaro.org> writes:
> Configuration of 64-bit host on 32-bit guest will shortly
> be denied. Use a 32-bit guest instead.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v2 10/14] configure: Define TARGET_LONG_BITS in configs/targets/*.mak
2025-02-03 3:18 [PATCH v2 00/14] meson: Deprecate 32-bit host support Richard Henderson
` (8 preceding siblings ...)
2025-02-03 3:18 ` [PATCH v2 09/14] gitlab: Replace aarch64 with arm in cross-i686-tci build Richard Henderson
@ 2025-02-03 3:18 ` Richard Henderson
2025-02-03 10:39 ` Thomas Huth
` (2 more replies)
2025-02-03 3:18 ` [PATCH v2 11/14] target/*: Remove TARGET_LONG_BITS from cpu-param.h Richard Henderson
` (4 subsequent siblings)
14 siblings, 3 replies; 62+ messages in thread
From: Richard Henderson @ 2025-02-03 3:18 UTC (permalink / raw)
To: qemu-devel; +Cc: pbonzini, mark.cave-ayland, berrange, philmd, thuth
Define TARGET_LONG_BITS in each target's configure fragment.
Do this without removing the define in target/*/cpu-param.h
so that errors are caught like so:
In file included from .../src/include/exec/cpu-defs.h:26,
from ../src/target/hppa/cpu.h:24,
from ../src/linux-user/qemu.h:4,
from ../src/linux-user/hppa/cpu_loop.c:21:
../src/target/hppa/cpu-param.h:11: error: "TARGET_LONG_BITS" redefined [-Werror]
11 | #define TARGET_LONG_BITS 64
|
In file included from .../src/include/qemu/osdep.h:36,
from ../src/linux-user/hppa/cpu_loop.c:20:
./hppa-linux-user-config-target.h:32: note: this is the location of the previous definition
32 | #define TARGET_LONG_BITS 32
|
cc1: all warnings being treated as errors
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
configs/targets/aarch64-bsd-user.mak | 1 +
configs/targets/aarch64-linux-user.mak | 1 +
configs/targets/aarch64-softmmu.mak | 1 +
configs/targets/aarch64_be-linux-user.mak | 1 +
configs/targets/alpha-linux-user.mak | 1 +
configs/targets/alpha-softmmu.mak | 1 +
configs/targets/arm-bsd-user.mak | 1 +
configs/targets/arm-linux-user.mak | 1 +
configs/targets/arm-softmmu.mak | 1 +
configs/targets/armeb-linux-user.mak | 1 +
configs/targets/avr-softmmu.mak | 1 +
configs/targets/hexagon-linux-user.mak | 1 +
configs/targets/hppa-linux-user.mak | 2 ++
configs/targets/hppa-softmmu.mak | 1 +
configs/targets/i386-bsd-user.mak | 1 +
configs/targets/i386-linux-user.mak | 1 +
configs/targets/i386-softmmu.mak | 1 +
configs/targets/loongarch64-linux-user.mak | 1 +
configs/targets/loongarch64-softmmu.mak | 1 +
configs/targets/m68k-linux-user.mak | 1 +
configs/targets/m68k-softmmu.mak | 1 +
configs/targets/microblaze-linux-user.mak | 1 +
configs/targets/microblaze-softmmu.mak | 3 +++
configs/targets/microblazeel-linux-user.mak | 1 +
configs/targets/microblazeel-softmmu.mak | 3 +++
configs/targets/mips-linux-user.mak | 1 +
configs/targets/mips-softmmu.mak | 1 +
configs/targets/mips64-linux-user.mak | 1 +
configs/targets/mips64-softmmu.mak | 1 +
configs/targets/mips64el-linux-user.mak | 1 +
configs/targets/mips64el-softmmu.mak | 1 +
configs/targets/mipsel-linux-user.mak | 1 +
configs/targets/mipsel-softmmu.mak | 1 +
configs/targets/mipsn32-linux-user.mak | 1 +
configs/targets/mipsn32el-linux-user.mak | 1 +
configs/targets/or1k-linux-user.mak | 1 +
configs/targets/or1k-softmmu.mak | 1 +
configs/targets/ppc-linux-user.mak | 1 +
configs/targets/ppc-softmmu.mak | 1 +
configs/targets/ppc64-linux-user.mak | 1 +
configs/targets/ppc64-softmmu.mak | 1 +
configs/targets/ppc64le-linux-user.mak | 1 +
configs/targets/riscv32-linux-user.mak | 1 +
configs/targets/riscv32-softmmu.mak | 1 +
configs/targets/riscv64-bsd-user.mak | 1 +
configs/targets/riscv64-linux-user.mak | 1 +
configs/targets/riscv64-softmmu.mak | 1 +
configs/targets/rx-softmmu.mak | 1 +
configs/targets/s390x-linux-user.mak | 1 +
configs/targets/s390x-softmmu.mak | 1 +
configs/targets/sh4-linux-user.mak | 1 +
configs/targets/sh4-softmmu.mak | 1 +
configs/targets/sh4eb-linux-user.mak | 1 +
configs/targets/sh4eb-softmmu.mak | 1 +
configs/targets/sparc-linux-user.mak | 1 +
configs/targets/sparc-softmmu.mak | 1 +
configs/targets/sparc32plus-linux-user.mak | 1 +
configs/targets/sparc64-linux-user.mak | 1 +
configs/targets/sparc64-softmmu.mak | 1 +
configs/targets/tricore-softmmu.mak | 1 +
configs/targets/x86_64-bsd-user.mak | 1 +
configs/targets/x86_64-linux-user.mak | 1 +
configs/targets/x86_64-softmmu.mak | 1 +
configs/targets/xtensa-linux-user.mak | 1 +
configs/targets/xtensa-softmmu.mak | 1 +
configs/targets/xtensaeb-linux-user.mak | 1 +
configs/targets/xtensaeb-softmmu.mak | 1 +
67 files changed, 72 insertions(+)
diff --git a/configs/targets/aarch64-bsd-user.mak b/configs/targets/aarch64-bsd-user.mak
index 8aaa5d8c80..f99c73377a 100644
--- a/configs/targets/aarch64-bsd-user.mak
+++ b/configs/targets/aarch64-bsd-user.mak
@@ -1,3 +1,4 @@
TARGET_ARCH=aarch64
TARGET_BASE_ARCH=arm
TARGET_XML_FILES= gdb-xml/aarch64-core.xml gdb-xml/aarch64-fpu.xml gdb-xml/aarch64-pauth.xml
+TARGET_LONG_BITS=64
diff --git a/configs/targets/aarch64-linux-user.mak b/configs/targets/aarch64-linux-user.mak
index 4c6570f56a..b779ac3b4a 100644
--- a/configs/targets/aarch64-linux-user.mak
+++ b/configs/targets/aarch64-linux-user.mak
@@ -6,3 +6,4 @@ CONFIG_SEMIHOSTING=y
CONFIG_ARM_COMPATIBLE_SEMIHOSTING=y
TARGET_SYSTBL_ABI=common,64,renameat,rlimit,memfd_secret
TARGET_SYSTBL=syscall_64.tbl
+TARGET_LONG_BITS=64
diff --git a/configs/targets/aarch64-softmmu.mak b/configs/targets/aarch64-softmmu.mak
index 84cb32dc2f..82cb72cb83 100644
--- a/configs/targets/aarch64-softmmu.mak
+++ b/configs/targets/aarch64-softmmu.mak
@@ -5,3 +5,4 @@ TARGET_KVM_HAVE_GUEST_DEBUG=y
TARGET_XML_FILES= gdb-xml/aarch64-core.xml gdb-xml/aarch64-fpu.xml gdb-xml/arm-core.xml gdb-xml/arm-vfp.xml gdb-xml/arm-vfp3.xml gdb-xml/arm-vfp-sysregs.xml gdb-xml/arm-neon.xml gdb-xml/arm-m-profile.xml gdb-xml/arm-m-profile-mve.xml gdb-xml/aarch64-pauth.xml
# needed by boot.c
TARGET_NEED_FDT=y
+TARGET_LONG_BITS=64
diff --git a/configs/targets/aarch64_be-linux-user.mak b/configs/targets/aarch64_be-linux-user.mak
index dcef597a80..ef9be02290 100644
--- a/configs/targets/aarch64_be-linux-user.mak
+++ b/configs/targets/aarch64_be-linux-user.mak
@@ -7,3 +7,4 @@ CONFIG_SEMIHOSTING=y
CONFIG_ARM_COMPATIBLE_SEMIHOSTING=y
TARGET_SYSTBL_ABI=common,64,renameat,rlimit,memfd_secret
TARGET_SYSTBL=syscall_64.tbl
+TARGET_LONG_BITS=64
diff --git a/configs/targets/alpha-linux-user.mak b/configs/targets/alpha-linux-user.mak
index f7d3fb4afa..ef8e365b09 100644
--- a/configs/targets/alpha-linux-user.mak
+++ b/configs/targets/alpha-linux-user.mak
@@ -1,3 +1,4 @@
TARGET_ARCH=alpha
TARGET_SYSTBL_ABI=common
TARGET_SYSTBL=syscall.tbl
+TARGET_LONG_BITS=64
diff --git a/configs/targets/alpha-softmmu.mak b/configs/targets/alpha-softmmu.mak
index 9dbe160740..89f3517aca 100644
--- a/configs/targets/alpha-softmmu.mak
+++ b/configs/targets/alpha-softmmu.mak
@@ -1,2 +1,3 @@
TARGET_ARCH=alpha
TARGET_SUPPORTS_MTTCG=y
+TARGET_LONG_BITS=64
diff --git a/configs/targets/arm-bsd-user.mak b/configs/targets/arm-bsd-user.mak
index cb143e6426..472a4f9fb1 100644
--- a/configs/targets/arm-bsd-user.mak
+++ b/configs/targets/arm-bsd-user.mak
@@ -1,2 +1,3 @@
TARGET_ARCH=arm
TARGET_XML_FILES= gdb-xml/arm-core.xml gdb-xml/arm-vfp.xml gdb-xml/arm-vfp3.xml gdb-xml/arm-vfp-sysregs.xml gdb-xml/arm-neon.xml gdb-xml/arm-m-profile.xml gdb-xml/arm-m-profile-mve.xml
+TARGET_LONG_BITS=32
diff --git a/configs/targets/arm-linux-user.mak b/configs/targets/arm-linux-user.mak
index 7f5d65794c..bf35ded7fe 100644
--- a/configs/targets/arm-linux-user.mak
+++ b/configs/targets/arm-linux-user.mak
@@ -5,3 +5,4 @@ TARGET_XML_FILES= gdb-xml/arm-core.xml gdb-xml/arm-vfp.xml gdb-xml/arm-vfp3.xml
TARGET_HAS_BFLT=y
CONFIG_SEMIHOSTING=y
CONFIG_ARM_COMPATIBLE_SEMIHOSTING=y
+TARGET_LONG_BITS=32
diff --git a/configs/targets/arm-softmmu.mak b/configs/targets/arm-softmmu.mak
index bf390b7a8d..afc64f5927 100644
--- a/configs/targets/arm-softmmu.mak
+++ b/configs/targets/arm-softmmu.mak
@@ -3,3 +3,4 @@ TARGET_SUPPORTS_MTTCG=y
TARGET_XML_FILES= gdb-xml/arm-core.xml gdb-xml/arm-vfp.xml gdb-xml/arm-vfp3.xml gdb-xml/arm-vfp-sysregs.xml gdb-xml/arm-neon.xml gdb-xml/arm-m-profile.xml gdb-xml/arm-m-profile-mve.xml
# needed by boot.c
TARGET_NEED_FDT=y
+TARGET_LONG_BITS=32
diff --git a/configs/targets/armeb-linux-user.mak b/configs/targets/armeb-linux-user.mak
index 943d0d87bf..35fa4d91b3 100644
--- a/configs/targets/armeb-linux-user.mak
+++ b/configs/targets/armeb-linux-user.mak
@@ -6,3 +6,4 @@ TARGET_XML_FILES= gdb-xml/arm-core.xml gdb-xml/arm-vfp.xml gdb-xml/arm-vfp3.xml
TARGET_HAS_BFLT=y
CONFIG_SEMIHOSTING=y
CONFIG_ARM_COMPATIBLE_SEMIHOSTING=y
+TARGET_LONG_BITS=32
diff --git a/configs/targets/avr-softmmu.mak b/configs/targets/avr-softmmu.mak
index e3f921c019..b6157fc465 100644
--- a/configs/targets/avr-softmmu.mak
+++ b/configs/targets/avr-softmmu.mak
@@ -1,2 +1,3 @@
TARGET_ARCH=avr
TARGET_XML_FILES= gdb-xml/avr-cpu.xml
+TARGET_LONG_BITS=32
diff --git a/configs/targets/hexagon-linux-user.mak b/configs/targets/hexagon-linux-user.mak
index b912045bd3..aec1a04d1b 100644
--- a/configs/targets/hexagon-linux-user.mak
+++ b/configs/targets/hexagon-linux-user.mak
@@ -2,3 +2,4 @@ TARGET_ARCH=hexagon
TARGET_XML_FILES=gdb-xml/hexagon-core.xml gdb-xml/hexagon-hvx.xml
TARGET_SYSTBL=syscall.tbl
TARGET_SYSTBL_ABI=common,32,hexagon,time32,stat64,rlimit,renameat
+TARGET_LONG_BITS=32
diff --git a/configs/targets/hppa-linux-user.mak b/configs/targets/hppa-linux-user.mak
index 8e0a80492f..4295cf384e 100644
--- a/configs/targets/hppa-linux-user.mak
+++ b/configs/targets/hppa-linux-user.mak
@@ -3,3 +3,5 @@ TARGET_ABI32=y
TARGET_SYSTBL_ABI=common,32
TARGET_SYSTBL=syscall.tbl
TARGET_BIG_ENDIAN=y
+# Compromise to ease maintainence vs system mode
+TARGET_LONG_BITS=64
diff --git a/configs/targets/hppa-softmmu.mak b/configs/targets/hppa-softmmu.mak
index a41662aa99..63ca74ed5e 100644
--- a/configs/targets/hppa-softmmu.mak
+++ b/configs/targets/hppa-softmmu.mak
@@ -1,3 +1,4 @@
TARGET_ARCH=hppa
TARGET_BIG_ENDIAN=y
TARGET_SUPPORTS_MTTCG=y
+TARGET_LONG_BITS=64
diff --git a/configs/targets/i386-bsd-user.mak b/configs/targets/i386-bsd-user.mak
index 0283bb62a0..70e098da49 100644
--- a/configs/targets/i386-bsd-user.mak
+++ b/configs/targets/i386-bsd-user.mak
@@ -1,2 +1,3 @@
TARGET_ARCH=i386
TARGET_XML_FILES= gdb-xml/i386-32bit.xml
+TARGET_LONG_BITS=32
diff --git a/configs/targets/i386-linux-user.mak b/configs/targets/i386-linux-user.mak
index b72a156473..ea68a266fc 100644
--- a/configs/targets/i386-linux-user.mak
+++ b/configs/targets/i386-linux-user.mak
@@ -2,3 +2,4 @@ TARGET_ARCH=i386
TARGET_SYSTBL_ABI=i386
TARGET_SYSTBL=syscall_32.tbl
TARGET_XML_FILES= gdb-xml/i386-32bit.xml gdb-xml/i386-32bit-linux.xml
+TARGET_LONG_BITS=32
diff --git a/configs/targets/i386-softmmu.mak b/configs/targets/i386-softmmu.mak
index 2eb0e86250..5dd8921756 100644
--- a/configs/targets/i386-softmmu.mak
+++ b/configs/targets/i386-softmmu.mak
@@ -3,3 +3,4 @@ TARGET_SUPPORTS_MTTCG=y
TARGET_KVM_HAVE_GUEST_DEBUG=y
TARGET_KVM_HAVE_RESET_PARKED_VCPU=y
TARGET_XML_FILES= gdb-xml/i386-32bit.xml
+TARGET_LONG_BITS=32
diff --git a/configs/targets/loongarch64-linux-user.mak b/configs/targets/loongarch64-linux-user.mak
index dfded79dfa..249a26a798 100644
--- a/configs/targets/loongarch64-linux-user.mak
+++ b/configs/targets/loongarch64-linux-user.mak
@@ -4,3 +4,4 @@ TARGET_BASE_ARCH=loongarch
TARGET_XML_FILES=gdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu.xml gdb-xml/loongarch-lsx.xml gdb-xml/loongarch-lasx.xml
TARGET_SYSTBL=syscall.tbl
TARGET_SYSTBL_ABI=common,64
+TARGET_LONG_BITS=64
diff --git a/configs/targets/loongarch64-softmmu.mak b/configs/targets/loongarch64-softmmu.mak
index ce19ab6a16..351341132f 100644
--- a/configs/targets/loongarch64-softmmu.mak
+++ b/configs/targets/loongarch64-softmmu.mak
@@ -5,3 +5,4 @@ TARGET_SUPPORTS_MTTCG=y
TARGET_XML_FILES= gdb-xml/loongarch-base32.xml gdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu.xml gdb-xml/loongarch-lsx.xml gdb-xml/loongarch-lasx.xml
# all boards require libfdt
TARGET_NEED_FDT=y
+TARGET_LONG_BITS=64
diff --git a/configs/targets/m68k-linux-user.mak b/configs/targets/m68k-linux-user.mak
index 579b5d299c..2d9bae2270 100644
--- a/configs/targets/m68k-linux-user.mak
+++ b/configs/targets/m68k-linux-user.mak
@@ -4,3 +4,4 @@ TARGET_SYSTBL=syscall.tbl
TARGET_BIG_ENDIAN=y
TARGET_XML_FILES= gdb-xml/cf-core.xml gdb-xml/cf-fp.xml gdb-xml/m68k-core.xml gdb-xml/m68k-fp.xml
TARGET_HAS_BFLT=y
+TARGET_LONG_BITS=32
diff --git a/configs/targets/m68k-softmmu.mak b/configs/targets/m68k-softmmu.mak
index bbcd0bada6..bacc52e96a 100644
--- a/configs/targets/m68k-softmmu.mak
+++ b/configs/targets/m68k-softmmu.mak
@@ -1,3 +1,4 @@
TARGET_ARCH=m68k
TARGET_BIG_ENDIAN=y
TARGET_XML_FILES= gdb-xml/cf-core.xml gdb-xml/cf-fp.xml gdb-xml/m68k-core.xml gdb-xml/m68k-fp.xml
+TARGET_LONG_BITS=32
diff --git a/configs/targets/microblaze-linux-user.mak b/configs/targets/microblaze-linux-user.mak
index 0a2322c249..3772779769 100644
--- a/configs/targets/microblaze-linux-user.mak
+++ b/configs/targets/microblaze-linux-user.mak
@@ -4,3 +4,4 @@ TARGET_SYSTBL=syscall.tbl
TARGET_BIG_ENDIAN=y
TARGET_HAS_BFLT=y
TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml
+TARGET_LONG_BITS=32
diff --git a/configs/targets/microblaze-softmmu.mak b/configs/targets/microblaze-softmmu.mak
index eea266d4f3..99a33ed44a 100644
--- a/configs/targets/microblaze-softmmu.mak
+++ b/configs/targets/microblaze-softmmu.mak
@@ -4,3 +4,6 @@ TARGET_SUPPORTS_MTTCG=y
# needed by boot.c
TARGET_NEED_FDT=y
TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml
+# System mode can address up to 64 bits via lea/sea instructions.
+# TODO: These bypass the mmu, so we could emulate these differently.
+TARGET_LONG_BITS=64
diff --git a/configs/targets/microblazeel-linux-user.mak b/configs/targets/microblazeel-linux-user.mak
index 270743156a..a51a05488d 100644
--- a/configs/targets/microblazeel-linux-user.mak
+++ b/configs/targets/microblazeel-linux-user.mak
@@ -3,3 +3,4 @@ TARGET_SYSTBL_ABI=common
TARGET_SYSTBL=syscall.tbl
TARGET_HAS_BFLT=y
TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml
+TARGET_LONG_BITS=32
diff --git a/configs/targets/microblazeel-softmmu.mak b/configs/targets/microblazeel-softmmu.mak
index 77b968acad..52cdeae1a2 100644
--- a/configs/targets/microblazeel-softmmu.mak
+++ b/configs/targets/microblazeel-softmmu.mak
@@ -3,3 +3,6 @@ TARGET_SUPPORTS_MTTCG=y
# needed by boot.c
TARGET_NEED_FDT=y
TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml
+# System mode can address up to 64 bits via lea/sea instructions.
+# TODO: These bypass the mmu, so we could emulate these differently.
+TARGET_LONG_BITS=64
diff --git a/configs/targets/mips-linux-user.mak b/configs/targets/mips-linux-user.mak
index b4569a9893..69bdc459b6 100644
--- a/configs/targets/mips-linux-user.mak
+++ b/configs/targets/mips-linux-user.mak
@@ -3,3 +3,4 @@ TARGET_ABI_MIPSO32=y
TARGET_SYSTBL_ABI=o32
TARGET_SYSTBL=syscall_o32.tbl
TARGET_BIG_ENDIAN=y
+TARGET_LONG_BITS=32
diff --git a/configs/targets/mips-softmmu.mak b/configs/targets/mips-softmmu.mak
index d34b4083fc..b62a088249 100644
--- a/configs/targets/mips-softmmu.mak
+++ b/configs/targets/mips-softmmu.mak
@@ -1,3 +1,4 @@
TARGET_ARCH=mips
TARGET_BIG_ENDIAN=y
TARGET_SUPPORTS_MTTCG=y
+TARGET_LONG_BITS=32
diff --git a/configs/targets/mips64-linux-user.mak b/configs/targets/mips64-linux-user.mak
index d2ff509a11..04e82b3ab1 100644
--- a/configs/targets/mips64-linux-user.mak
+++ b/configs/targets/mips64-linux-user.mak
@@ -4,3 +4,4 @@ TARGET_BASE_ARCH=mips
TARGET_SYSTBL_ABI=n64
TARGET_SYSTBL=syscall_n64.tbl
TARGET_BIG_ENDIAN=y
+TARGET_LONG_BITS=64
diff --git a/configs/targets/mips64-softmmu.mak b/configs/targets/mips64-softmmu.mak
index 12d9483bf0..7202655fca 100644
--- a/configs/targets/mips64-softmmu.mak
+++ b/configs/targets/mips64-softmmu.mak
@@ -1,3 +1,4 @@
TARGET_ARCH=mips64
TARGET_BASE_ARCH=mips
TARGET_BIG_ENDIAN=y
+TARGET_LONG_BITS=64
diff --git a/configs/targets/mips64el-linux-user.mak b/configs/targets/mips64el-linux-user.mak
index f9efeec8ea..27f4169426 100644
--- a/configs/targets/mips64el-linux-user.mak
+++ b/configs/targets/mips64el-linux-user.mak
@@ -3,3 +3,4 @@ TARGET_ABI_MIPSN64=y
TARGET_BASE_ARCH=mips
TARGET_SYSTBL_ABI=n64
TARGET_SYSTBL=syscall_n64.tbl
+TARGET_LONG_BITS=64
diff --git a/configs/targets/mips64el-softmmu.mak b/configs/targets/mips64el-softmmu.mak
index 3864daa736..3ebeadb29e 100644
--- a/configs/targets/mips64el-softmmu.mak
+++ b/configs/targets/mips64el-softmmu.mak
@@ -1,2 +1,3 @@
TARGET_ARCH=mips64
TARGET_BASE_ARCH=mips
+TARGET_LONG_BITS=64
diff --git a/configs/targets/mipsel-linux-user.mak b/configs/targets/mipsel-linux-user.mak
index e8d7241d31..8b7e86ab28 100644
--- a/configs/targets/mipsel-linux-user.mak
+++ b/configs/targets/mipsel-linux-user.mak
@@ -2,3 +2,4 @@ TARGET_ARCH=mips
TARGET_ABI_MIPSO32=y
TARGET_SYSTBL_ABI=o32
TARGET_SYSTBL=syscall_o32.tbl
+TARGET_LONG_BITS=32
diff --git a/configs/targets/mipsel-softmmu.mak b/configs/targets/mipsel-softmmu.mak
index 0829659fc2..620ec68178 100644
--- a/configs/targets/mipsel-softmmu.mak
+++ b/configs/targets/mipsel-softmmu.mak
@@ -1,2 +1,3 @@
TARGET_ARCH=mips
TARGET_SUPPORTS_MTTCG=y
+TARGET_LONG_BITS=32
diff --git a/configs/targets/mipsn32-linux-user.mak b/configs/targets/mipsn32-linux-user.mak
index 206095da64..39ae214633 100644
--- a/configs/targets/mipsn32-linux-user.mak
+++ b/configs/targets/mipsn32-linux-user.mak
@@ -5,3 +5,4 @@ TARGET_BASE_ARCH=mips
TARGET_SYSTBL_ABI=n32
TARGET_SYSTBL=syscall_n32.tbl
TARGET_BIG_ENDIAN=y
+TARGET_LONG_BITS=64
diff --git a/configs/targets/mipsn32el-linux-user.mak b/configs/targets/mipsn32el-linux-user.mak
index ca2a3ed753..d9b61d6990 100644
--- a/configs/targets/mipsn32el-linux-user.mak
+++ b/configs/targets/mipsn32el-linux-user.mak
@@ -4,3 +4,4 @@ TARGET_ABI32=y
TARGET_BASE_ARCH=mips
TARGET_SYSTBL_ABI=n32
TARGET_SYSTBL=syscall_n32.tbl
+TARGET_LONG_BITS=64
diff --git a/configs/targets/or1k-linux-user.mak b/configs/targets/or1k-linux-user.mak
index eecb1e2241..810567a98f 100644
--- a/configs/targets/or1k-linux-user.mak
+++ b/configs/targets/or1k-linux-user.mak
@@ -2,3 +2,4 @@ TARGET_ARCH=openrisc
TARGET_BIG_ENDIAN=y
TARGET_SYSTBL_ABI=common,32,or1k,time32,stat64,rlimit,renameat
TARGET_SYSTBL=syscall.tbl
+TARGET_LONG_BITS=32
diff --git a/configs/targets/or1k-softmmu.mak b/configs/targets/or1k-softmmu.mak
index 0341cb2a6b..adfddb1a8a 100644
--- a/configs/targets/or1k-softmmu.mak
+++ b/configs/targets/or1k-softmmu.mak
@@ -3,3 +3,4 @@ TARGET_SUPPORTS_MTTCG=y
TARGET_BIG_ENDIAN=y
# needed by boot.c and all boards
TARGET_NEED_FDT=y
+TARGET_LONG_BITS=32
diff --git a/configs/targets/ppc-linux-user.mak b/configs/targets/ppc-linux-user.mak
index cc0439a528..970d04a5ba 100644
--- a/configs/targets/ppc-linux-user.mak
+++ b/configs/targets/ppc-linux-user.mak
@@ -3,3 +3,4 @@ TARGET_SYSTBL_ABI=common,nospu,32
TARGET_SYSTBL=syscall.tbl
TARGET_BIG_ENDIAN=y
TARGET_XML_FILES= gdb-xml/power-core.xml gdb-xml/power-fpu.xml gdb-xml/power-altivec.xml gdb-xml/power-spe.xml
+TARGET_LONG_BITS=32
diff --git a/configs/targets/ppc-softmmu.mak b/configs/targets/ppc-softmmu.mak
index 53120dab41..9bfa7df6c3 100644
--- a/configs/targets/ppc-softmmu.mak
+++ b/configs/targets/ppc-softmmu.mak
@@ -2,3 +2,4 @@ TARGET_ARCH=ppc
TARGET_BIG_ENDIAN=y
TARGET_KVM_HAVE_GUEST_DEBUG=y
TARGET_XML_FILES= gdb-xml/power-core.xml gdb-xml/power-fpu.xml gdb-xml/power-altivec.xml gdb-xml/power-spe.xml
+TARGET_LONG_BITS=32
diff --git a/configs/targets/ppc64-linux-user.mak b/configs/targets/ppc64-linux-user.mak
index 4d81969f4a..461f1c67d1 100644
--- a/configs/targets/ppc64-linux-user.mak
+++ b/configs/targets/ppc64-linux-user.mak
@@ -5,3 +5,4 @@ TARGET_SYSTBL_ABI=common,nospu,64
TARGET_SYSTBL=syscall.tbl
TARGET_BIG_ENDIAN=y
TARGET_XML_FILES= gdb-xml/power64-core.xml gdb-xml/power-fpu.xml gdb-xml/power-altivec.xml gdb-xml/power-spe.xml gdb-xml/power-vsx.xml
+TARGET_LONG_BITS=64
diff --git a/configs/targets/ppc64-softmmu.mak b/configs/targets/ppc64-softmmu.mak
index 40881d9396..7cee0e97f4 100644
--- a/configs/targets/ppc64-softmmu.mak
+++ b/configs/targets/ppc64-softmmu.mak
@@ -6,3 +6,4 @@ TARGET_KVM_HAVE_GUEST_DEBUG=y
TARGET_XML_FILES= gdb-xml/power64-core.xml gdb-xml/power-fpu.xml gdb-xml/power-altivec.xml gdb-xml/power-spe.xml gdb-xml/power-vsx.xml
# all boards require libfdt
TARGET_NEED_FDT=y
+TARGET_LONG_BITS=64
diff --git a/configs/targets/ppc64le-linux-user.mak b/configs/targets/ppc64le-linux-user.mak
index 426d5a28d6..cf9d8a400d 100644
--- a/configs/targets/ppc64le-linux-user.mak
+++ b/configs/targets/ppc64le-linux-user.mak
@@ -4,3 +4,4 @@ TARGET_ABI_DIR=ppc
TARGET_SYSTBL_ABI=common,nospu,64
TARGET_SYSTBL=syscall.tbl
TARGET_XML_FILES= gdb-xml/power64-core.xml gdb-xml/power-fpu.xml gdb-xml/power-altivec.xml gdb-xml/power-spe.xml gdb-xml/power-vsx.xml
+TARGET_LONG_BITS=64
diff --git a/configs/targets/riscv32-linux-user.mak b/configs/targets/riscv32-linux-user.mak
index 0dbaf5210a..a0ef03c0c3 100644
--- a/configs/targets/riscv32-linux-user.mak
+++ b/configs/targets/riscv32-linux-user.mak
@@ -7,3 +7,4 @@ CONFIG_ARM_COMPATIBLE_SEMIHOSTING=y
TARGET_SYSTBL_ABI=32
TARGET_SYSTBL_ABI=common,32,riscv,memfd_secret
TARGET_SYSTBL=syscall.tbl
+TARGET_LONG_BITS=32
diff --git a/configs/targets/riscv32-softmmu.mak b/configs/targets/riscv32-softmmu.mak
index 338182d5b8..c828066ce6 100644
--- a/configs/targets/riscv32-softmmu.mak
+++ b/configs/targets/riscv32-softmmu.mak
@@ -4,3 +4,4 @@ TARGET_SUPPORTS_MTTCG=y
TARGET_XML_FILES= gdb-xml/riscv-32bit-cpu.xml gdb-xml/riscv-32bit-fpu.xml gdb-xml/riscv-64bit-fpu.xml gdb-xml/riscv-32bit-virtual.xml
# needed by boot.c
TARGET_NEED_FDT=y
+TARGET_LONG_BITS=32
diff --git a/configs/targets/riscv64-bsd-user.mak b/configs/targets/riscv64-bsd-user.mak
index 191c2c483f..c6348a7962 100644
--- a/configs/targets/riscv64-bsd-user.mak
+++ b/configs/targets/riscv64-bsd-user.mak
@@ -2,3 +2,4 @@ TARGET_ARCH=riscv64
TARGET_BASE_ARCH=riscv
TARGET_ABI_DIR=riscv
TARGET_XML_FILES= gdb-xml/riscv-64bit-cpu.xml gdb-xml/riscv-32bit-fpu.xml gdb-xml/riscv-64bit-fpu.xml gdb-xml/riscv-64bit-virtual.xml
+TARGET_LONG_BITS=64
diff --git a/configs/targets/riscv64-linux-user.mak b/configs/targets/riscv64-linux-user.mak
index 477cd4523e..aac7568305 100644
--- a/configs/targets/riscv64-linux-user.mak
+++ b/configs/targets/riscv64-linux-user.mak
@@ -7,3 +7,4 @@ CONFIG_ARM_COMPATIBLE_SEMIHOSTING=y
TARGET_SYSTBL_ABI=64
TARGET_SYSTBL_ABI=common,64,riscv,rlimit,memfd_secret
TARGET_SYSTBL=syscall.tbl
+TARGET_LONG_BITS=64
diff --git a/configs/targets/riscv64-softmmu.mak b/configs/targets/riscv64-softmmu.mak
index 6c5de72e03..09f613d24a 100644
--- a/configs/targets/riscv64-softmmu.mak
+++ b/configs/targets/riscv64-softmmu.mak
@@ -5,3 +5,4 @@ TARGET_KVM_HAVE_GUEST_DEBUG=y
TARGET_XML_FILES= gdb-xml/riscv-64bit-cpu.xml gdb-xml/riscv-32bit-fpu.xml gdb-xml/riscv-64bit-fpu.xml gdb-xml/riscv-64bit-virtual.xml gdb-xml/riscv-32bit-cpu.xml gdb-xml/riscv-32bit-virtual.xml
# needed by boot.c
TARGET_NEED_FDT=y
+TARGET_LONG_BITS=64
diff --git a/configs/targets/rx-softmmu.mak b/configs/targets/rx-softmmu.mak
index 706bbe6062..1c250a6450 100644
--- a/configs/targets/rx-softmmu.mak
+++ b/configs/targets/rx-softmmu.mak
@@ -2,3 +2,4 @@ TARGET_ARCH=rx
TARGET_XML_FILES= gdb-xml/rx-core.xml
# all boards require libfdt
TARGET_NEED_FDT=y
+TARGET_LONG_BITS=32
diff --git a/configs/targets/s390x-linux-user.mak b/configs/targets/s390x-linux-user.mak
index 24c04c8589..68c2f28872 100644
--- a/configs/targets/s390x-linux-user.mak
+++ b/configs/targets/s390x-linux-user.mak
@@ -3,3 +3,4 @@ TARGET_SYSTBL_ABI=common,64
TARGET_SYSTBL=syscall.tbl
TARGET_BIG_ENDIAN=y
TARGET_XML_FILES= gdb-xml/s390x-core64.xml gdb-xml/s390-acr.xml gdb-xml/s390-fpr.xml gdb-xml/s390-vx.xml gdb-xml/s390-cr.xml gdb-xml/s390-virt.xml gdb-xml/s390-virt-kvm.xml gdb-xml/s390-gs.xml
+TARGET_LONG_BITS=64
diff --git a/configs/targets/s390x-softmmu.mak b/configs/targets/s390x-softmmu.mak
index b22218aacc..5242ebe7c2 100644
--- a/configs/targets/s390x-softmmu.mak
+++ b/configs/targets/s390x-softmmu.mak
@@ -3,3 +3,4 @@ TARGET_BIG_ENDIAN=y
TARGET_SUPPORTS_MTTCG=y
TARGET_KVM_HAVE_GUEST_DEBUG=y
TARGET_XML_FILES= gdb-xml/s390x-core64.xml gdb-xml/s390-acr.xml gdb-xml/s390-fpr.xml gdb-xml/s390-vx.xml gdb-xml/s390-cr.xml gdb-xml/s390-virt.xml gdb-xml/s390-virt-kvm.xml gdb-xml/s390-gs.xml
+TARGET_LONG_BITS=64
diff --git a/configs/targets/sh4-linux-user.mak b/configs/targets/sh4-linux-user.mak
index 9908887566..d58c5471b7 100644
--- a/configs/targets/sh4-linux-user.mak
+++ b/configs/targets/sh4-linux-user.mak
@@ -2,3 +2,4 @@ TARGET_ARCH=sh4
TARGET_SYSTBL_ABI=common
TARGET_SYSTBL=syscall.tbl
TARGET_HAS_BFLT=y
+TARGET_LONG_BITS=32
diff --git a/configs/targets/sh4-softmmu.mak b/configs/targets/sh4-softmmu.mak
index f9d62d91e4..787d349b50 100644
--- a/configs/targets/sh4-softmmu.mak
+++ b/configs/targets/sh4-softmmu.mak
@@ -1 +1,2 @@
TARGET_ARCH=sh4
+TARGET_LONG_BITS=32
diff --git a/configs/targets/sh4eb-linux-user.mak b/configs/targets/sh4eb-linux-user.mak
index 9db6b3609c..99007f0f2d 100644
--- a/configs/targets/sh4eb-linux-user.mak
+++ b/configs/targets/sh4eb-linux-user.mak
@@ -3,3 +3,4 @@ TARGET_SYSTBL_ABI=common
TARGET_SYSTBL=syscall.tbl
TARGET_BIG_ENDIAN=y
TARGET_HAS_BFLT=y
+TARGET_LONG_BITS=32
diff --git a/configs/targets/sh4eb-softmmu.mak b/configs/targets/sh4eb-softmmu.mak
index 226b1fc698..cdea2c61c5 100644
--- a/configs/targets/sh4eb-softmmu.mak
+++ b/configs/targets/sh4eb-softmmu.mak
@@ -1,2 +1,3 @@
TARGET_ARCH=sh4
TARGET_BIG_ENDIAN=y
+TARGET_LONG_BITS=32
diff --git a/configs/targets/sparc-linux-user.mak b/configs/targets/sparc-linux-user.mak
index abcfb8fc62..4ff4b7287d 100644
--- a/configs/targets/sparc-linux-user.mak
+++ b/configs/targets/sparc-linux-user.mak
@@ -2,3 +2,4 @@ TARGET_ARCH=sparc
TARGET_SYSTBL_ABI=common,32
TARGET_SYSTBL=syscall.tbl
TARGET_BIG_ENDIAN=y
+TARGET_LONG_BITS=32
diff --git a/configs/targets/sparc-softmmu.mak b/configs/targets/sparc-softmmu.mak
index a5d9200382..78c2e25bd1 100644
--- a/configs/targets/sparc-softmmu.mak
+++ b/configs/targets/sparc-softmmu.mak
@@ -1,3 +1,4 @@
TARGET_ARCH=sparc
TARGET_BIG_ENDIAN=y
TARGET_SUPPORTS_MTTCG=y
+TARGET_LONG_BITS=32
diff --git a/configs/targets/sparc32plus-linux-user.mak b/configs/targets/sparc32plus-linux-user.mak
index 6cc8fa516b..7a16934fd1 100644
--- a/configs/targets/sparc32plus-linux-user.mak
+++ b/configs/targets/sparc32plus-linux-user.mak
@@ -5,3 +5,4 @@ TARGET_ABI_DIR=sparc
TARGET_SYSTBL_ABI=common,32
TARGET_SYSTBL=syscall.tbl
TARGET_BIG_ENDIAN=y
+TARGET_LONG_BITS=64
diff --git a/configs/targets/sparc64-linux-user.mak b/configs/targets/sparc64-linux-user.mak
index 52f05ec000..64ea04e3e2 100644
--- a/configs/targets/sparc64-linux-user.mak
+++ b/configs/targets/sparc64-linux-user.mak
@@ -4,3 +4,4 @@ TARGET_ABI_DIR=sparc
TARGET_SYSTBL_ABI=common,64
TARGET_SYSTBL=syscall.tbl
TARGET_BIG_ENDIAN=y
+TARGET_LONG_BITS=64
diff --git a/configs/targets/sparc64-softmmu.mak b/configs/targets/sparc64-softmmu.mak
index 36ca64ec41..f7bab97a00 100644
--- a/configs/targets/sparc64-softmmu.mak
+++ b/configs/targets/sparc64-softmmu.mak
@@ -2,3 +2,4 @@ TARGET_ARCH=sparc64
TARGET_BASE_ARCH=sparc
TARGET_BIG_ENDIAN=y
TARGET_SUPPORTS_MTTCG=y
+TARGET_LONG_BITS=64
diff --git a/configs/targets/tricore-softmmu.mak b/configs/targets/tricore-softmmu.mak
index 96b10af853..781ce49a62 100644
--- a/configs/targets/tricore-softmmu.mak
+++ b/configs/targets/tricore-softmmu.mak
@@ -1 +1,2 @@
TARGET_ARCH=tricore
+TARGET_LONG_BITS=32
diff --git a/configs/targets/x86_64-bsd-user.mak b/configs/targets/x86_64-bsd-user.mak
index 799cd4acd4..d62d656f2c 100644
--- a/configs/targets/x86_64-bsd-user.mak
+++ b/configs/targets/x86_64-bsd-user.mak
@@ -1,3 +1,4 @@
TARGET_ARCH=x86_64
TARGET_BASE_ARCH=i386
TARGET_XML_FILES= gdb-xml/i386-64bit.xml
+TARGET_LONG_BITS=64
diff --git a/configs/targets/x86_64-linux-user.mak b/configs/targets/x86_64-linux-user.mak
index 86042814d3..b093ab5a16 100644
--- a/configs/targets/x86_64-linux-user.mak
+++ b/configs/targets/x86_64-linux-user.mak
@@ -3,3 +3,4 @@ TARGET_BASE_ARCH=i386
TARGET_SYSTBL_ABI=common,64
TARGET_SYSTBL=syscall_64.tbl
TARGET_XML_FILES= gdb-xml/i386-64bit.xml gdb-xml/i386-64bit-linux.xml
+TARGET_LONG_BITS=64
diff --git a/configs/targets/x86_64-softmmu.mak b/configs/targets/x86_64-softmmu.mak
index 920e9a4200..1ceefde131 100644
--- a/configs/targets/x86_64-softmmu.mak
+++ b/configs/targets/x86_64-softmmu.mak
@@ -4,3 +4,4 @@ TARGET_SUPPORTS_MTTCG=y
TARGET_KVM_HAVE_GUEST_DEBUG=y
TARGET_KVM_HAVE_RESET_PARKED_VCPU=y
TARGET_XML_FILES= gdb-xml/i386-64bit.xml
+TARGET_LONG_BITS=64
diff --git a/configs/targets/xtensa-linux-user.mak b/configs/targets/xtensa-linux-user.mak
index 420b30a68d..cbec6e368a 100644
--- a/configs/targets/xtensa-linux-user.mak
+++ b/configs/targets/xtensa-linux-user.mak
@@ -2,3 +2,4 @@ TARGET_ARCH=xtensa
TARGET_SYSTBL_ABI=common
TARGET_SYSTBL=syscall.tbl
TARGET_HAS_BFLT=y
+TARGET_LONG_BITS=32
diff --git a/configs/targets/xtensa-softmmu.mak b/configs/targets/xtensa-softmmu.mak
index f075557bfa..65845df4ff 100644
--- a/configs/targets/xtensa-softmmu.mak
+++ b/configs/targets/xtensa-softmmu.mak
@@ -1,2 +1,3 @@
TARGET_ARCH=xtensa
TARGET_SUPPORTS_MTTCG=y
+TARGET_LONG_BITS=32
diff --git a/configs/targets/xtensaeb-linux-user.mak b/configs/targets/xtensaeb-linux-user.mak
index bce2d1d65d..f455b1c780 100644
--- a/configs/targets/xtensaeb-linux-user.mak
+++ b/configs/targets/xtensaeb-linux-user.mak
@@ -3,3 +3,4 @@ TARGET_SYSTBL_ABI=common
TARGET_SYSTBL=syscall.tbl
TARGET_BIG_ENDIAN=y
TARGET_HAS_BFLT=y
+TARGET_LONG_BITS=32
diff --git a/configs/targets/xtensaeb-softmmu.mak b/configs/targets/xtensaeb-softmmu.mak
index b02e11b820..f1f789d697 100644
--- a/configs/targets/xtensaeb-softmmu.mak
+++ b/configs/targets/xtensaeb-softmmu.mak
@@ -1,3 +1,4 @@
TARGET_ARCH=xtensa
TARGET_BIG_ENDIAN=y
TARGET_SUPPORTS_MTTCG=y
+TARGET_LONG_BITS=32
--
2.43.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v2 10/14] configure: Define TARGET_LONG_BITS in configs/targets/*.mak
2025-02-03 3:18 ` [PATCH v2 10/14] configure: Define TARGET_LONG_BITS in configs/targets/*.mak Richard Henderson
@ 2025-02-03 10:39 ` Thomas Huth
2025-02-03 12:33 ` Alex Bennée
2025-02-03 16:49 ` Richard Henderson
2025-02-03 17:48 ` Philippe Mathieu-Daudé
2025-02-03 18:30 ` Philippe Mathieu-Daudé
2 siblings, 2 replies; 62+ messages in thread
From: Thomas Huth @ 2025-02-03 10:39 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
Cc: pbonzini, mark.cave-ayland, berrange, philmd
On 03/02/2025 04.18, Richard Henderson wrote:
> Define TARGET_LONG_BITS in each target's configure fragment.
> Do this without removing the define in target/*/cpu-param.h
> so that errors are caught like so:
>
> In file included from .../src/include/exec/cpu-defs.h:26,
> from ../src/target/hppa/cpu.h:24,
> from ../src/linux-user/qemu.h:4,
> from ../src/linux-user/hppa/cpu_loop.c:21:
> ../src/target/hppa/cpu-param.h:11: error: "TARGET_LONG_BITS" redefined [-Werror]
> 11 | #define TARGET_LONG_BITS 64
> |
> In file included from .../src/include/qemu/osdep.h:36,
> from ../src/linux-user/hppa/cpu_loop.c:20:
> ./hppa-linux-user-config-target.h:32: note: this is the location of the previous definition
> 32 | #define TARGET_LONG_BITS 32
> |
> cc1: all warnings being treated as errors
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
[...]> diff --git a/configs/targets/hppa-linux-user.mak
b/configs/targets/hppa-linux-user.mak
> index 8e0a80492f..4295cf384e 100644
> --- a/configs/targets/hppa-linux-user.mak
> +++ b/configs/targets/hppa-linux-user.mak
> @@ -3,3 +3,5 @@ TARGET_ABI32=y
> TARGET_SYSTBL_ABI=common,32
> TARGET_SYSTBL=syscall.tbl
> TARGET_BIG_ENDIAN=y
> +# Compromise to ease maintainence vs system mode
s/maintainence/maintenance/
> diff --git a/configs/targets/mipsn32-linux-user.mak b/configs/targets/mipsn32-linux-user.mak
> index 206095da64..39ae214633 100644
> --- a/configs/targets/mipsn32-linux-user.mak
> +++ b/configs/targets/mipsn32-linux-user.mak
> @@ -5,3 +5,4 @@ TARGET_BASE_ARCH=mips
> TARGET_SYSTBL_ABI=n32
> TARGET_SYSTBL=syscall_n32.tbl
> TARGET_BIG_ENDIAN=y
> +TARGET_LONG_BITS=64
Why is this 64 ?
> diff --git a/configs/targets/mipsn32el-linux-user.mak b/configs/targets/mipsn32el-linux-user.mak
> index ca2a3ed753..d9b61d6990 100644
> --- a/configs/targets/mipsn32el-linux-user.mak
> +++ b/configs/targets/mipsn32el-linux-user.mak
> @@ -4,3 +4,4 @@ TARGET_ABI32=y
> TARGET_BASE_ARCH=mips
> TARGET_SYSTBL_ABI=n32
> TARGET_SYSTBL=syscall_n32.tbl
> +TARGET_LONG_BITS=64
dito?
> diff --git a/configs/targets/sparc32plus-linux-user.mak b/configs/targets/sparc32plus-linux-user.mak
> index 6cc8fa516b..7a16934fd1 100644
> --- a/configs/targets/sparc32plus-linux-user.mak
> +++ b/configs/targets/sparc32plus-linux-user.mak
> @@ -5,3 +5,4 @@ TARGET_ABI_DIR=sparc
> TARGET_SYSTBL_ABI=common,32
> TARGET_SYSTBL=syscall.tbl
> TARGET_BIG_ENDIAN=y
> +TARGET_LONG_BITS=64
Same question here: Why 64? If this isn't a mistake, could you maybe add a
comment?
Thanks,
Thomas
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 10/14] configure: Define TARGET_LONG_BITS in configs/targets/*.mak
2025-02-03 10:39 ` Thomas Huth
@ 2025-02-03 12:33 ` Alex Bennée
2025-02-03 16:49 ` Richard Henderson
1 sibling, 0 replies; 62+ messages in thread
From: Alex Bennée @ 2025-02-03 12:33 UTC (permalink / raw)
To: Thomas Huth
Cc: Richard Henderson, qemu-devel, pbonzini, mark.cave-ayland,
berrange, philmd
Thomas Huth <thuth@redhat.com> writes:
> On 03/02/2025 04.18, Richard Henderson wrote:
>> Define TARGET_LONG_BITS in each target's configure fragment.
>> Do this without removing the define in target/*/cpu-param.h
>> so that errors are caught like so:
>> In file included from .../src/include/exec/cpu-defs.h:26,
>> from ../src/target/hppa/cpu.h:24,
>> from ../src/linux-user/qemu.h:4,
>> from ../src/linux-user/hppa/cpu_loop.c:21:
>> ../src/target/hppa/cpu-param.h:11: error: "TARGET_LONG_BITS" redefined [-Werror]
>> 11 | #define TARGET_LONG_BITS 64
>> |
>> In file included from .../src/include/qemu/osdep.h:36,
>> from ../src/linux-user/hppa/cpu_loop.c:20:
>> ./hppa-linux-user-config-target.h:32: note: this is the location of the previous definition
>> 32 | #define TARGET_LONG_BITS 32
>> |
>> cc1: all warnings being treated as errors
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
> [...]> diff --git a/configs/targets/hppa-linux-user.mak
> b/configs/targets/hppa-linux-user.mak
>> index 8e0a80492f..4295cf384e 100644
>> --- a/configs/targets/hppa-linux-user.mak
>> +++ b/configs/targets/hppa-linux-user.mak
>> @@ -3,3 +3,5 @@ TARGET_ABI32=y
>> TARGET_SYSTBL_ABI=common,32
>> TARGET_SYSTBL=syscall.tbl
>> TARGET_BIG_ENDIAN=y
>> +# Compromise to ease maintainence vs system mode
>
> s/maintainence/maintenance/
>
>> diff --git a/configs/targets/mipsn32-linux-user.mak b/configs/targets/mipsn32-linux-user.mak
>> index 206095da64..39ae214633 100644
>> --- a/configs/targets/mipsn32-linux-user.mak
>> +++ b/configs/targets/mipsn32-linux-user.mak
>> @@ -5,3 +5,4 @@ TARGET_BASE_ARCH=mips
>> TARGET_SYSTBL_ABI=n32
>> TARGET_SYSTBL=syscall_n32.tbl
>> TARGET_BIG_ENDIAN=y
>> +TARGET_LONG_BITS=64
>
> Why is this 64 ?
>
>> diff --git a/configs/targets/mipsn32el-linux-user.mak b/configs/targets/mipsn32el-linux-user.mak
>> index ca2a3ed753..d9b61d6990 100644
>> --- a/configs/targets/mipsn32el-linux-user.mak
>> +++ b/configs/targets/mipsn32el-linux-user.mak
>> @@ -4,3 +4,4 @@ TARGET_ABI32=y
>> TARGET_BASE_ARCH=mips
>> TARGET_SYSTBL_ABI=n32
>> TARGET_SYSTBL=syscall_n32.tbl
>> +TARGET_LONG_BITS=64
>
> dito?
Are these 64 bit linux-user with 32 bit ABIs like x32?
>
>> diff --git a/configs/targets/sparc32plus-linux-user.mak b/configs/targets/sparc32plus-linux-user.mak
>> index 6cc8fa516b..7a16934fd1 100644
>> --- a/configs/targets/sparc32plus-linux-user.mak
>> +++ b/configs/targets/sparc32plus-linux-user.mak
>> @@ -5,3 +5,4 @@ TARGET_ABI_DIR=sparc
>> TARGET_SYSTBL_ABI=common,32
>> TARGET_SYSTBL=syscall.tbl
>> TARGET_BIG_ENDIAN=y
>> +TARGET_LONG_BITS=64
>
> Same question here: Why 64? If this isn't a mistake, could you maybe
> add a comment?
This is definitely one of those weird 32bit ABI on 64 host.
>
> Thanks,
> Thomas
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 10/14] configure: Define TARGET_LONG_BITS in configs/targets/*.mak
2025-02-03 10:39 ` Thomas Huth
2025-02-03 12:33 ` Alex Bennée
@ 2025-02-03 16:49 ` Richard Henderson
2025-02-03 17:39 ` Thomas Huth
1 sibling, 1 reply; 62+ messages in thread
From: Richard Henderson @ 2025-02-03 16:49 UTC (permalink / raw)
To: Thomas Huth, qemu-devel; +Cc: pbonzini, mark.cave-ayland, berrange, philmd
On 2/3/25 02:39, Thomas Huth wrote:
> [...]> diff --git a/configs/targets/hppa-linux-user.mak b/configs/targets/hppa-linux-user.mak
>> index 8e0a80492f..4295cf384e 100644
>> --- a/configs/targets/hppa-linux-user.mak
>> +++ b/configs/targets/hppa-linux-user.mak
>> @@ -3,3 +3,5 @@ TARGET_ABI32=y
>> TARGET_SYSTBL_ABI=common,32
>> TARGET_SYSTBL=syscall.tbl
>> TARGET_BIG_ENDIAN=y
>> +# Compromise to ease maintainence vs system mode
>
> s/maintainence/maintenance/
Oops.
>
>> diff --git a/configs/targets/mipsn32-linux-user.mak b/configs/targets/mipsn32-linux-
>> user.mak
>> index 206095da64..39ae214633 100644
>> --- a/configs/targets/mipsn32-linux-user.mak
>> +++ b/configs/targets/mipsn32-linux-user.mak
>> @@ -5,3 +5,4 @@ TARGET_BASE_ARCH=mips
>> TARGET_SYSTBL_ABI=n32
>> TARGET_SYSTBL=syscall_n32.tbl
>> TARGET_BIG_ENDIAN=y
>> +TARGET_LONG_BITS=64
>
> Why is this 64 ?
>
>> diff --git a/configs/targets/mipsn32el-linux-user.mak b/configs/targets/mipsn32el-linux-
>> user.mak
>> index ca2a3ed753..d9b61d6990 100644
>> --- a/configs/targets/mipsn32el-linux-user.mak
>> +++ b/configs/targets/mipsn32el-linux-user.mak
>> @@ -4,3 +4,4 @@ TARGET_ABI32=y
>> TARGET_BASE_ARCH=mips
>> TARGET_SYSTBL_ABI=n32
>> TARGET_SYSTBL=syscall_n32.tbl
>> +TARGET_LONG_BITS=64
>
> dito?
>
>> diff --git a/configs/targets/sparc32plus-linux-user.mak b/configs/targets/sparc32plus-
>> linux-user.mak
>> index 6cc8fa516b..7a16934fd1 100644
>> --- a/configs/targets/sparc32plus-linux-user.mak
>> +++ b/configs/targets/sparc32plus-linux-user.mak
>> @@ -5,3 +5,4 @@ TARGET_ABI_DIR=sparc
>> TARGET_SYSTBL_ABI=common,32
>> TARGET_SYSTBL=syscall.tbl
>> TARGET_BIG_ENDIAN=y
>> +TARGET_LONG_BITS=64
>
> Same question here: Why 64? If this isn't a mistake, could you maybe add a comment?
All three are 64-bit cpus using an ABI with 32-bit pointers.
r~
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 10/14] configure: Define TARGET_LONG_BITS in configs/targets/*.mak
2025-02-03 16:49 ` Richard Henderson
@ 2025-02-03 17:39 ` Thomas Huth
0 siblings, 0 replies; 62+ messages in thread
From: Thomas Huth @ 2025-02-03 17:39 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
Cc: pbonzini, mark.cave-ayland, berrange, philmd
On 03/02/2025 17.49, Richard Henderson wrote:
> On 2/3/25 02:39, Thomas Huth wrote:
>> [...]> diff --git a/configs/targets/hppa-linux-user.mak b/configs/targets/
>> hppa-linux-user.mak
>>> index 8e0a80492f..4295cf384e 100644
>>> --- a/configs/targets/hppa-linux-user.mak
>>> +++ b/configs/targets/hppa-linux-user.mak
>>> @@ -3,3 +3,5 @@ TARGET_ABI32=y
>>> TARGET_SYSTBL_ABI=common,32
>>> TARGET_SYSTBL=syscall.tbl
>>> TARGET_BIG_ENDIAN=y
>>> +# Compromise to ease maintainence vs system mode
>>
>> s/maintainence/maintenance/
>
> Oops.
>
>>
>>> diff --git a/configs/targets/mipsn32-linux-user.mak b/configs/targets/
>>> mipsn32-linux- user.mak
>>> index 206095da64..39ae214633 100644
>>> --- a/configs/targets/mipsn32-linux-user.mak
>>> +++ b/configs/targets/mipsn32-linux-user.mak
>>> @@ -5,3 +5,4 @@ TARGET_BASE_ARCH=mips
>>> TARGET_SYSTBL_ABI=n32
>>> TARGET_SYSTBL=syscall_n32.tbl
>>> TARGET_BIG_ENDIAN=y
>>> +TARGET_LONG_BITS=64
>>
>> Why is this 64 ?
>>
>>> diff --git a/configs/targets/mipsn32el-linux-user.mak b/configs/targets/
>>> mipsn32el-linux- user.mak
>>> index ca2a3ed753..d9b61d6990 100644
>>> --- a/configs/targets/mipsn32el-linux-user.mak
>>> +++ b/configs/targets/mipsn32el-linux-user.mak
>>> @@ -4,3 +4,4 @@ TARGET_ABI32=y
>>> TARGET_BASE_ARCH=mips
>>> TARGET_SYSTBL_ABI=n32
>>> TARGET_SYSTBL=syscall_n32.tbl
>>> +TARGET_LONG_BITS=64
>>
>> dito?
>>
>>> diff --git a/configs/targets/sparc32plus-linux-user.mak b/configs/
>>> targets/sparc32plus- linux-user.mak
>>> index 6cc8fa516b..7a16934fd1 100644
>>> --- a/configs/targets/sparc32plus-linux-user.mak
>>> +++ b/configs/targets/sparc32plus-linux-user.mak
>>> @@ -5,3 +5,4 @@ TARGET_ABI_DIR=sparc
>>> TARGET_SYSTBL_ABI=common,32
>>> TARGET_SYSTBL=syscall.tbl
>>> TARGET_BIG_ENDIAN=y
>>> +TARGET_LONG_BITS=64
>>
>> Same question here: Why 64? If this isn't a mistake, could you maybe add a
>> comment?
>
> All three are 64-bit cpus using an ABI with 32-bit pointers.
Ok, thanks, makes sense now. So with the typo fixed:
Reviewed-by: Thomas Huth <thuth@redhat.com>
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 10/14] configure: Define TARGET_LONG_BITS in configs/targets/*.mak
2025-02-03 3:18 ` [PATCH v2 10/14] configure: Define TARGET_LONG_BITS in configs/targets/*.mak Richard Henderson
2025-02-03 10:39 ` Thomas Huth
@ 2025-02-03 17:48 ` Philippe Mathieu-Daudé
2025-02-03 18:30 ` Philippe Mathieu-Daudé
2 siblings, 0 replies; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-02-03 17:48 UTC (permalink / raw)
To: Richard Henderson, qemu-devel, Edgar E. Iglesias
Cc: pbonzini, mark.cave-ayland, berrange, thuth
On 3/2/25 04:18, Richard Henderson wrote:
> Define TARGET_LONG_BITS in each target's configure fragment.
> Do this without removing the define in target/*/cpu-param.h
> so that errors are caught like so:
>
> In file included from .../src/include/exec/cpu-defs.h:26,
> from ../src/target/hppa/cpu.h:24,
> from ../src/linux-user/qemu.h:4,
> from ../src/linux-user/hppa/cpu_loop.c:21:
> ../src/target/hppa/cpu-param.h:11: error: "TARGET_LONG_BITS" redefined [-Werror]
> 11 | #define TARGET_LONG_BITS 64
> |
> In file included from .../src/include/qemu/osdep.h:36,
> from ../src/linux-user/hppa/cpu_loop.c:20:
> ./hppa-linux-user-config-target.h:32: note: this is the location of the previous definition
> 32 | #define TARGET_LONG_BITS 32
> |
> cc1: all warnings being treated as errors
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> configs/targets/aarch64-bsd-user.mak | 1 +
> configs/targets/aarch64-linux-user.mak | 1 +
> configs/targets/aarch64-softmmu.mak | 1 +
> configs/targets/aarch64_be-linux-user.mak | 1 +
> configs/targets/alpha-linux-user.mak | 1 +
> configs/targets/alpha-softmmu.mak | 1 +
> configs/targets/arm-bsd-user.mak | 1 +
> configs/targets/arm-linux-user.mak | 1 +
> configs/targets/arm-softmmu.mak | 1 +
> configs/targets/armeb-linux-user.mak | 1 +
> configs/targets/avr-softmmu.mak | 1 +
> configs/targets/hexagon-linux-user.mak | 1 +
> configs/targets/hppa-linux-user.mak | 2 ++
> configs/targets/hppa-softmmu.mak | 1 +
> configs/targets/i386-bsd-user.mak | 1 +
> configs/targets/i386-linux-user.mak | 1 +
> configs/targets/i386-softmmu.mak | 1 +
> configs/targets/loongarch64-linux-user.mak | 1 +
> configs/targets/loongarch64-softmmu.mak | 1 +
> configs/targets/m68k-linux-user.mak | 1 +
> configs/targets/m68k-softmmu.mak | 1 +
> configs/targets/microblaze-linux-user.mak | 1 +
> configs/targets/microblaze-softmmu.mak | 3 +++
> configs/targets/microblazeel-linux-user.mak | 1 +
> configs/targets/microblazeel-softmmu.mak | 3 +++
> configs/targets/mips-linux-user.mak | 1 +
> configs/targets/mips-softmmu.mak | 1 +
> configs/targets/mips64-linux-user.mak | 1 +
> configs/targets/mips64-softmmu.mak | 1 +
> configs/targets/mips64el-linux-user.mak | 1 +
> configs/targets/mips64el-softmmu.mak | 1 +
> configs/targets/mipsel-linux-user.mak | 1 +
> configs/targets/mipsel-softmmu.mak | 1 +
> configs/targets/mipsn32-linux-user.mak | 1 +
> configs/targets/mipsn32el-linux-user.mak | 1 +
> configs/targets/or1k-linux-user.mak | 1 +
> configs/targets/or1k-softmmu.mak | 1 +
> configs/targets/ppc-linux-user.mak | 1 +
> configs/targets/ppc-softmmu.mak | 1 +
> configs/targets/ppc64-linux-user.mak | 1 +
> configs/targets/ppc64-softmmu.mak | 1 +
> configs/targets/ppc64le-linux-user.mak | 1 +
> configs/targets/riscv32-linux-user.mak | 1 +
> configs/targets/riscv32-softmmu.mak | 1 +
> configs/targets/riscv64-bsd-user.mak | 1 +
> configs/targets/riscv64-linux-user.mak | 1 +
> configs/targets/riscv64-softmmu.mak | 1 +
> configs/targets/rx-softmmu.mak | 1 +
> configs/targets/s390x-linux-user.mak | 1 +
> configs/targets/s390x-softmmu.mak | 1 +
> configs/targets/sh4-linux-user.mak | 1 +
> configs/targets/sh4-softmmu.mak | 1 +
> configs/targets/sh4eb-linux-user.mak | 1 +
> configs/targets/sh4eb-softmmu.mak | 1 +
> configs/targets/sparc-linux-user.mak | 1 +
> configs/targets/sparc-softmmu.mak | 1 +
> configs/targets/sparc32plus-linux-user.mak | 1 +
> configs/targets/sparc64-linux-user.mak | 1 +
> configs/targets/sparc64-softmmu.mak | 1 +
> configs/targets/tricore-softmmu.mak | 1 +
> configs/targets/x86_64-bsd-user.mak | 1 +
> configs/targets/x86_64-linux-user.mak | 1 +
> configs/targets/x86_64-softmmu.mak | 1 +
> configs/targets/xtensa-linux-user.mak | 1 +
> configs/targets/xtensa-softmmu.mak | 1 +
> configs/targets/xtensaeb-linux-user.mak | 1 +
> configs/targets/xtensaeb-softmmu.mak | 1 +
> 67 files changed, 72 insertions(+)
Simpler to review split in 2 (32, 64).
$ git grep -l TARGET_LONG_BITS=32 configs/targets/
configs/targets/arm-bsd-user.mak
configs/targets/arm-linux-user.mak
configs/targets/arm-softmmu.mak
configs/targets/armeb-linux-user.mak
configs/targets/avr-softmmu.mak
configs/targets/hexagon-linux-user.mak
configs/targets/i386-bsd-user.mak
configs/targets/i386-linux-user.mak
configs/targets/i386-softmmu.mak
configs/targets/m68k-linux-user.mak
configs/targets/m68k-softmmu.mak
configs/targets/microblaze-linux-user.mak
configs/targets/microblazeel-linux-user.mak
configs/targets/mips-linux-user.mak
configs/targets/mips-softmmu.mak
configs/targets/mipsel-linux-user.mak
configs/targets/mipsel-softmmu.mak
configs/targets/or1k-linux-user.mak
configs/targets/or1k-softmmu.mak
configs/targets/ppc-linux-user.mak
configs/targets/ppc-softmmu.mak
configs/targets/riscv32-linux-user.mak
configs/targets/riscv32-softmmu.mak
configs/targets/rx-softmmu.mak
configs/targets/sh4-linux-user.mak
configs/targets/sh4-softmmu.mak
configs/targets/sh4eb-linux-user.mak
configs/targets/sh4eb-softmmu.mak
configs/targets/sparc-linux-user.mak
configs/targets/sparc-softmmu.mak
configs/targets/tricore-softmmu.mak
configs/targets/xtensa-linux-user.mak
configs/targets/xtensa-softmmu.mak
configs/targets/xtensaeb-linux-user.mak
configs/targets/xtensaeb-softmmu.mak
OK.
$ git grep -l TARGET_LONG_BITS=64 configs/targets/
configs/targets/aarch64-bsd-user.mak
configs/targets/aarch64-linux-user.mak
configs/targets/aarch64-softmmu.mak
configs/targets/aarch64_be-linux-user.mak
configs/targets/alpha-linux-user.mak
configs/targets/alpha-softmmu.mak
configs/targets/hppa-linux-user.mak
configs/targets/hppa-softmmu.mak
configs/targets/loongarch64-linux-user.mak
configs/targets/loongarch64-softmmu.mak
configs/targets/microblaze-softmmu.mak
configs/targets/microblazeel-softmmu.mak
Surprising, only 32-bit ISA is implemented.
Looking at the patch context I see:
+# System mode can address up to 64 bits via lea/sea instructions.
+# TODO: These bypass the mmu, so we could emulate these differently.
configs/targets/mips64-linux-user.mak
configs/targets/mips64-softmmu.mak
configs/targets/mips64el-linux-user.mak
configs/targets/mips64el-softmmu.mak
configs/targets/mipsn32-linux-user.mak
configs/targets/mipsn32el-linux-user.mak
configs/targets/ppc64-linux-user.mak
configs/targets/ppc64-softmmu.mak
configs/targets/ppc64le-linux-user.mak
configs/targets/riscv64-bsd-user.mak
configs/targets/riscv64-linux-user.mak
configs/targets/riscv64-softmmu.mak
configs/targets/s390x-linux-user.mak
configs/targets/s390x-softmmu.mak
configs/targets/sparc32plus-linux-user.mak
configs/targets/sparc64-linux-user.mak
configs/targets/sparc64-softmmu.mak
configs/targets/x86_64-bsd-user.mak
configs/targets/x86_64-linux-user.mak
configs/targets/x86_64-softmmu.mak
OK.
Preferably splitting 32/64:
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 10/14] configure: Define TARGET_LONG_BITS in configs/targets/*.mak
2025-02-03 3:18 ` [PATCH v2 10/14] configure: Define TARGET_LONG_BITS in configs/targets/*.mak Richard Henderson
2025-02-03 10:39 ` Thomas Huth
2025-02-03 17:48 ` Philippe Mathieu-Daudé
@ 2025-02-03 18:30 ` Philippe Mathieu-Daudé
2025-02-03 19:19 ` Richard Henderson
2 siblings, 1 reply; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-02-03 18:30 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: pbonzini, mark.cave-ayland, berrange, thuth
On 3/2/25 04:18, Richard Henderson wrote:
> Define TARGET_LONG_BITS in each target's configure fragment.
> Do this without removing the define in target/*/cpu-param.h
> so that errors are caught like so:
>
> In file included from .../src/include/exec/cpu-defs.h:26,
> from ../src/target/hppa/cpu.h:24,
> from ../src/linux-user/qemu.h:4,
> from ../src/linux-user/hppa/cpu_loop.c:21:
> ../src/target/hppa/cpu-param.h:11: error: "TARGET_LONG_BITS" redefined [-Werror]
> 11 | #define TARGET_LONG_BITS 64
> |
> In file included from .../src/include/qemu/osdep.h:36,
> from ../src/linux-user/hppa/cpu_loop.c:20:
> ./hppa-linux-user-config-target.h:32: note: this is the location of the previous definition
> 32 | #define TARGET_LONG_BITS 32
> |
> cc1: all warnings being treated as errors
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
Orthogonal to this series, what about the other definitions,
like TARGET_PHYS_ADDR_SPACE_BITS / TARGET_VIRT_ADDR_SPACE_BITS
and possibly TARGET_PAGE_BITS?
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 10/14] configure: Define TARGET_LONG_BITS in configs/targets/*.mak
2025-02-03 18:30 ` Philippe Mathieu-Daudé
@ 2025-02-03 19:19 ` Richard Henderson
0 siblings, 0 replies; 62+ messages in thread
From: Richard Henderson @ 2025-02-03 19:19 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: pbonzini, mark.cave-ayland, berrange, thuth
On 2/3/25 10:30, Philippe Mathieu-Daudé wrote:
> On 3/2/25 04:18, Richard Henderson wrote:
>> Define TARGET_LONG_BITS in each target's configure fragment.
>> Do this without removing the define in target/*/cpu-param.h
>> so that errors are caught like so:
>>
>> In file included from .../src/include/exec/cpu-defs.h:26,
>> from ../src/target/hppa/cpu.h:24,
>> from ../src/linux-user/qemu.h:4,
>> from ../src/linux-user/hppa/cpu_loop.c:21:
>> ../src/target/hppa/cpu-param.h:11: error: "TARGET_LONG_BITS" redefined [-Werror]
>> 11 | #define TARGET_LONG_BITS 64
>> |
>> In file included from .../src/include/qemu/osdep.h:36,
>> from ../src/linux-user/hppa/cpu_loop.c:20:
>> ./hppa-linux-user-config-target.h:32: note: this is the location of the previous definition
>> 32 | #define TARGET_LONG_BITS 32
>> |
>> cc1: all warnings being treated as errors
>>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>
> Orthogonal to this series, what about the other definitions,
> like TARGET_PHYS_ADDR_SPACE_BITS / TARGET_VIRT_ADDR_SPACE_BITS
> and possibly TARGET_PAGE_BITS?
We don't need those at configure time, so there's no need to move them.
r~
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v2 11/14] target/*: Remove TARGET_LONG_BITS from cpu-param.h
2025-02-03 3:18 [PATCH v2 00/14] meson: Deprecate 32-bit host support Richard Henderson
` (9 preceding siblings ...)
2025-02-03 3:18 ` [PATCH v2 10/14] configure: Define TARGET_LONG_BITS in configs/targets/*.mak Richard Henderson
@ 2025-02-03 3:18 ` Richard Henderson
2025-02-03 10:43 ` Thomas Huth
` (2 more replies)
2025-02-03 3:18 ` [PATCH v2 12/14] meson: Disallow 64-bit on 32-bit TCG emulation Richard Henderson
` (3 subsequent siblings)
14 siblings, 3 replies; 62+ messages in thread
From: Richard Henderson @ 2025-02-03 3:18 UTC (permalink / raw)
To: qemu-devel; +Cc: pbonzini, mark.cave-ayland, berrange, philmd, thuth
This is now handled by the configs/targets/*.mak fragment.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/alpha/cpu-param.h | 2 --
target/arm/cpu-param.h | 2 --
target/avr/cpu-param.h | 1 -
target/hexagon/cpu-param.h | 1 -
target/hppa/cpu-param.h | 2 --
target/i386/cpu-param.h | 2 --
target/loongarch/cpu-param.h | 1 -
target/m68k/cpu-param.h | 1 -
target/microblaze/cpu-param.h | 2 --
target/mips/cpu-param.h | 5 -----
target/openrisc/cpu-param.h | 1 -
target/ppc/cpu-param.h | 2 --
target/riscv/cpu-param.h | 2 --
target/rx/cpu-param.h | 1 -
target/s390x/cpu-param.h | 1 -
target/sh4/cpu-param.h | 1 -
target/sparc/cpu-param.h | 2 --
target/tricore/cpu-param.h | 1 -
target/xtensa/cpu-param.h | 1 -
19 files changed, 31 deletions(-)
diff --git a/target/alpha/cpu-param.h b/target/alpha/cpu-param.h
index c21ddf1afd..ff06e41497 100644
--- a/target/alpha/cpu-param.h
+++ b/target/alpha/cpu-param.h
@@ -8,8 +8,6 @@
#ifndef ALPHA_CPU_PARAM_H
#define ALPHA_CPU_PARAM_H
-#define TARGET_LONG_BITS 64
-
/* ??? EV4 has 34 phys addr bits, EV5 has 40, EV6 has 44. */
#define TARGET_PHYS_ADDR_SPACE_BITS 44
diff --git a/target/arm/cpu-param.h b/target/arm/cpu-param.h
index bed29613c8..896b35bd6d 100644
--- a/target/arm/cpu-param.h
+++ b/target/arm/cpu-param.h
@@ -9,11 +9,9 @@
#define ARM_CPU_PARAM_H
#ifdef TARGET_AARCH64
-# define TARGET_LONG_BITS 64
# define TARGET_PHYS_ADDR_SPACE_BITS 52
# define TARGET_VIRT_ADDR_SPACE_BITS 52
#else
-# define TARGET_LONG_BITS 32
# define TARGET_PHYS_ADDR_SPACE_BITS 40
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif
diff --git a/target/avr/cpu-param.h b/target/avr/cpu-param.h
index 93c2f470d0..81f3f49ee1 100644
--- a/target/avr/cpu-param.h
+++ b/target/avr/cpu-param.h
@@ -21,7 +21,6 @@
#ifndef AVR_CPU_PARAM_H
#define AVR_CPU_PARAM_H
-#define TARGET_LONG_BITS 32
/*
* TARGET_PAGE_BITS cannot be more than 8 bits because
* 1. all IO registers occupy [0x0000 .. 0x00ff] address range, and they
diff --git a/target/hexagon/cpu-param.h b/target/hexagon/cpu-param.h
index 71b4a9b83e..45ee7b4640 100644
--- a/target/hexagon/cpu-param.h
+++ b/target/hexagon/cpu-param.h
@@ -19,7 +19,6 @@
#define HEXAGON_CPU_PARAM_H
#define TARGET_PAGE_BITS 16 /* 64K pages */
-#define TARGET_LONG_BITS 32
#define TARGET_PHYS_ADDR_SPACE_BITS 36
#define TARGET_VIRT_ADDR_SPACE_BITS 32
diff --git a/target/hppa/cpu-param.h b/target/hppa/cpu-param.h
index ef3200f0f3..7ed6b5741e 100644
--- a/target/hppa/cpu-param.h
+++ b/target/hppa/cpu-param.h
@@ -8,8 +8,6 @@
#ifndef HPPA_CPU_PARAM_H
#define HPPA_CPU_PARAM_H
-#define TARGET_LONG_BITS 64
-
#if defined(CONFIG_USER_ONLY) && defined(TARGET_ABI32)
# define TARGET_PHYS_ADDR_SPACE_BITS 32
# define TARGET_VIRT_ADDR_SPACE_BITS 32
diff --git a/target/i386/cpu-param.h b/target/i386/cpu-param.h
index 8c75abe141..b0e884c5d7 100644
--- a/target/i386/cpu-param.h
+++ b/target/i386/cpu-param.h
@@ -9,7 +9,6 @@
#define I386_CPU_PARAM_H
#ifdef TARGET_X86_64
-# define TARGET_LONG_BITS 64
# define TARGET_PHYS_ADDR_SPACE_BITS 52
/*
* ??? This is really 48 bits, sign-extended, but the only thing
@@ -18,7 +17,6 @@
*/
# define TARGET_VIRT_ADDR_SPACE_BITS 47
#else
-# define TARGET_LONG_BITS 32
# define TARGET_PHYS_ADDR_SPACE_BITS 36
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif
diff --git a/target/loongarch/cpu-param.h b/target/loongarch/cpu-param.h
index db5ad1c69f..52437946e5 100644
--- a/target/loongarch/cpu-param.h
+++ b/target/loongarch/cpu-param.h
@@ -8,7 +8,6 @@
#ifndef LOONGARCH_CPU_PARAM_H
#define LOONGARCH_CPU_PARAM_H
-#define TARGET_LONG_BITS 64
#define TARGET_PHYS_ADDR_SPACE_BITS 48
#define TARGET_VIRT_ADDR_SPACE_BITS 48
diff --git a/target/m68k/cpu-param.h b/target/m68k/cpu-param.h
index 5bbe623ba7..7afbf6d302 100644
--- a/target/m68k/cpu-param.h
+++ b/target/m68k/cpu-param.h
@@ -8,7 +8,6 @@
#ifndef M68K_CPU_PARAM_H
#define M68K_CPU_PARAM_H
-#define TARGET_LONG_BITS 32
/*
* Coldfire Linux uses 8k pages
* and m68k linux uses 4k pages
diff --git a/target/microblaze/cpu-param.h b/target/microblaze/cpu-param.h
index 00efb509e3..c866ec6c14 100644
--- a/target/microblaze/cpu-param.h
+++ b/target/microblaze/cpu-param.h
@@ -17,11 +17,9 @@
* of address space.
*/
#ifdef CONFIG_USER_ONLY
-#define TARGET_LONG_BITS 32
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
#else
-#define TARGET_LONG_BITS 64
#define TARGET_PHYS_ADDR_SPACE_BITS 64
#define TARGET_VIRT_ADDR_SPACE_BITS 64
#endif
diff --git a/target/mips/cpu-param.h b/target/mips/cpu-param.h
index f3a37e2dbe..11b3ac0ac6 100644
--- a/target/mips/cpu-param.h
+++ b/target/mips/cpu-param.h
@@ -7,11 +7,6 @@
#ifndef MIPS_CPU_PARAM_H
#define MIPS_CPU_PARAM_H
-#ifdef TARGET_MIPS64
-# define TARGET_LONG_BITS 64
-#else
-# define TARGET_LONG_BITS 32
-#endif
#ifdef TARGET_ABI_MIPSN64
#define TARGET_PHYS_ADDR_SPACE_BITS 48
#define TARGET_VIRT_ADDR_SPACE_BITS 48
diff --git a/target/openrisc/cpu-param.h b/target/openrisc/cpu-param.h
index 6169ed9f55..37627f2c39 100644
--- a/target/openrisc/cpu-param.h
+++ b/target/openrisc/cpu-param.h
@@ -8,7 +8,6 @@
#ifndef OPENRISC_CPU_PARAM_H
#define OPENRISC_CPU_PARAM_H
-#define TARGET_LONG_BITS 32
#define TARGET_PAGE_BITS 13
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
diff --git a/target/ppc/cpu-param.h b/target/ppc/cpu-param.h
index 9c481b9f6c..6c4525fdf3 100644
--- a/target/ppc/cpu-param.h
+++ b/target/ppc/cpu-param.h
@@ -9,7 +9,6 @@
#define PPC_CPU_PARAM_H
#ifdef TARGET_PPC64
-# define TARGET_LONG_BITS 64
/*
* Note that the official physical address space bits is 62-M where M
* is implementation dependent. I've not looked up M for the set of
@@ -27,7 +26,6 @@
# define TARGET_VIRT_ADDR_SPACE_BITS 64
# endif
#else
-# define TARGET_LONG_BITS 32
# define TARGET_PHYS_ADDR_SPACE_BITS 36
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif
diff --git a/target/riscv/cpu-param.h b/target/riscv/cpu-param.h
index 25686192c0..fba30e966a 100644
--- a/target/riscv/cpu-param.h
+++ b/target/riscv/cpu-param.h
@@ -9,11 +9,9 @@
#define RISCV_CPU_PARAM_H
#if defined(TARGET_RISCV64)
-# define TARGET_LONG_BITS 64
# define TARGET_PHYS_ADDR_SPACE_BITS 56 /* 44-bit PPN */
# define TARGET_VIRT_ADDR_SPACE_BITS 48 /* sv48 */
#elif defined(TARGET_RISCV32)
-# define TARGET_LONG_BITS 32
# define TARGET_PHYS_ADDR_SPACE_BITS 34 /* 22-bit PPN */
# define TARGET_VIRT_ADDR_SPACE_BITS 32 /* sv32 */
#endif
diff --git a/target/rx/cpu-param.h b/target/rx/cpu-param.h
index 521d669bdf..ef1970a09e 100644
--- a/target/rx/cpu-param.h
+++ b/target/rx/cpu-param.h
@@ -19,7 +19,6 @@
#ifndef RX_CPU_PARAM_H
#define RX_CPU_PARAM_H
-#define TARGET_LONG_BITS 32
#define TARGET_PAGE_BITS 12
#define TARGET_PHYS_ADDR_SPACE_BITS 32
diff --git a/target/s390x/cpu-param.h b/target/s390x/cpu-param.h
index a05ffcf78d..5c331ec424 100644
--- a/target/s390x/cpu-param.h
+++ b/target/s390x/cpu-param.h
@@ -8,7 +8,6 @@
#ifndef S390_CPU_PARAM_H
#define S390_CPU_PARAM_H
-#define TARGET_LONG_BITS 64
#define TARGET_PAGE_BITS 12
#define TARGET_PHYS_ADDR_SPACE_BITS 64
#define TARGET_VIRT_ADDR_SPACE_BITS 64
diff --git a/target/sh4/cpu-param.h b/target/sh4/cpu-param.h
index a30ba992b3..2b6e11dd0a 100644
--- a/target/sh4/cpu-param.h
+++ b/target/sh4/cpu-param.h
@@ -8,7 +8,6 @@
#ifndef SH4_CPU_PARAM_H
#define SH4_CPU_PARAM_H
-#define TARGET_LONG_BITS 32
#define TARGET_PAGE_BITS 12 /* 4k */
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#ifdef CONFIG_USER_ONLY
diff --git a/target/sparc/cpu-param.h b/target/sparc/cpu-param.h
index 14105dc18b..6952ee2b82 100644
--- a/target/sparc/cpu-param.h
+++ b/target/sparc/cpu-param.h
@@ -8,7 +8,6 @@
#define SPARC_CPU_PARAM_H
#ifdef TARGET_SPARC64
-# define TARGET_LONG_BITS 64
# define TARGET_PAGE_BITS 13 /* 8k */
# define TARGET_PHYS_ADDR_SPACE_BITS 41
# ifdef TARGET_ABI32
@@ -17,7 +16,6 @@
# define TARGET_VIRT_ADDR_SPACE_BITS 44
# endif
#else
-# define TARGET_LONG_BITS 32
# define TARGET_PAGE_BITS 12 /* 4k */
# define TARGET_PHYS_ADDR_SPACE_BITS 36
# define TARGET_VIRT_ADDR_SPACE_BITS 32
diff --git a/target/tricore/cpu-param.h b/target/tricore/cpu-param.h
index e29d551dd6..790242ef3d 100644
--- a/target/tricore/cpu-param.h
+++ b/target/tricore/cpu-param.h
@@ -8,7 +8,6 @@
#ifndef TRICORE_CPU_PARAM_H
#define TRICORE_CPU_PARAM_H
-#define TARGET_LONG_BITS 32
#define TARGET_PAGE_BITS 14
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
diff --git a/target/xtensa/cpu-param.h b/target/xtensa/cpu-param.h
index 0000725f2f..5e4848ad05 100644
--- a/target/xtensa/cpu-param.h
+++ b/target/xtensa/cpu-param.h
@@ -8,7 +8,6 @@
#ifndef XTENSA_CPU_PARAM_H
#define XTENSA_CPU_PARAM_H
-#define TARGET_LONG_BITS 32
#define TARGET_PAGE_BITS 12
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#ifdef CONFIG_USER_ONLY
--
2.43.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v2 11/14] target/*: Remove TARGET_LONG_BITS from cpu-param.h
2025-02-03 3:18 ` [PATCH v2 11/14] target/*: Remove TARGET_LONG_BITS from cpu-param.h Richard Henderson
@ 2025-02-03 10:43 ` Thomas Huth
2025-02-03 12:34 ` Alex Bennée
2025-02-03 18:31 ` Philippe Mathieu-Daudé
2 siblings, 0 replies; 62+ messages in thread
From: Thomas Huth @ 2025-02-03 10:43 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
Cc: pbonzini, mark.cave-ayland, berrange, philmd
On 03/02/2025 04.18, Richard Henderson wrote:
> This is now handled by the configs/targets/*.mak fragment.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/alpha/cpu-param.h | 2 --
> target/arm/cpu-param.h | 2 --
> target/avr/cpu-param.h | 1 -
> target/hexagon/cpu-param.h | 1 -
> target/hppa/cpu-param.h | 2 --
> target/i386/cpu-param.h | 2 --
> target/loongarch/cpu-param.h | 1 -
> target/m68k/cpu-param.h | 1 -
> target/microblaze/cpu-param.h | 2 --
> target/mips/cpu-param.h | 5 -----
> target/openrisc/cpu-param.h | 1 -
> target/ppc/cpu-param.h | 2 --
> target/riscv/cpu-param.h | 2 --
> target/rx/cpu-param.h | 1 -
> target/s390x/cpu-param.h | 1 -
> target/sh4/cpu-param.h | 1 -
> target/sparc/cpu-param.h | 2 --
> target/tricore/cpu-param.h | 1 -
> target/xtensa/cpu-param.h | 1 -
> 19 files changed, 31 deletions(-)
Reviewed-by: Thomas Huth <thuth@redhat.com>
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 11/14] target/*: Remove TARGET_LONG_BITS from cpu-param.h
2025-02-03 3:18 ` [PATCH v2 11/14] target/*: Remove TARGET_LONG_BITS from cpu-param.h Richard Henderson
2025-02-03 10:43 ` Thomas Huth
@ 2025-02-03 12:34 ` Alex Bennée
2025-02-03 18:31 ` Philippe Mathieu-Daudé
2 siblings, 0 replies; 62+ messages in thread
From: Alex Bennée @ 2025-02-03 12:34 UTC (permalink / raw)
To: Richard Henderson
Cc: qemu-devel, pbonzini, mark.cave-ayland, berrange, philmd, thuth
Richard Henderson <richard.henderson@linaro.org> writes:
> This is now handled by the configs/targets/*.mak fragment.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 11/14] target/*: Remove TARGET_LONG_BITS from cpu-param.h
2025-02-03 3:18 ` [PATCH v2 11/14] target/*: Remove TARGET_LONG_BITS from cpu-param.h Richard Henderson
2025-02-03 10:43 ` Thomas Huth
2025-02-03 12:34 ` Alex Bennée
@ 2025-02-03 18:31 ` Philippe Mathieu-Daudé
2 siblings, 0 replies; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-02-03 18:31 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: pbonzini, mark.cave-ayland, berrange, thuth
On 3/2/25 04:18, Richard Henderson wrote:
> This is now handled by the configs/targets/*.mak fragment.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/alpha/cpu-param.h | 2 --
> target/arm/cpu-param.h | 2 --
> target/avr/cpu-param.h | 1 -
> target/hexagon/cpu-param.h | 1 -
> target/hppa/cpu-param.h | 2 --
> target/i386/cpu-param.h | 2 --
> target/loongarch/cpu-param.h | 1 -
> target/m68k/cpu-param.h | 1 -
> target/microblaze/cpu-param.h | 2 --
> target/mips/cpu-param.h | 5 -----
> target/openrisc/cpu-param.h | 1 -
> target/ppc/cpu-param.h | 2 --
> target/riscv/cpu-param.h | 2 --
> target/rx/cpu-param.h | 1 -
> target/s390x/cpu-param.h | 1 -
> target/sh4/cpu-param.h | 1 -
> target/sparc/cpu-param.h | 2 --
> target/tricore/cpu-param.h | 1 -
> target/xtensa/cpu-param.h | 1 -
> 19 files changed, 31 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v2 12/14] meson: Disallow 64-bit on 32-bit TCG emulation
2025-02-03 3:18 [PATCH v2 00/14] meson: Deprecate 32-bit host support Richard Henderson
` (10 preceding siblings ...)
2025-02-03 3:18 ` [PATCH v2 11/14] target/*: Remove TARGET_LONG_BITS from cpu-param.h Richard Henderson
@ 2025-02-03 3:18 ` Richard Henderson
2025-02-03 10:46 ` Thomas Huth
2025-02-03 13:54 ` Alex Bennée
2025-02-03 3:18 ` [PATCH v2 13/14] meson: Deprecate 32-bit host support Richard Henderson
` (2 subsequent siblings)
14 siblings, 2 replies; 62+ messages in thread
From: Richard Henderson @ 2025-02-03 3:18 UTC (permalink / raw)
To: qemu-devel; +Cc: pbonzini, mark.cave-ayland, berrange, philmd, thuth
For system mode, we can rarely support the amount of RAM that
the guest requires. Emulation is restricted to round-robin
mode, which solves many of the atomicity issues, but not those
associated with virtio. In any case, round-robin does nothing
to help the speed of emulation.
For user mode, most emulation does not succeed at all. Most
of the time we cannot even load 64-bit non-PIE binaries due
to lack of a 64-bit address space. Threads are run in
parallel, not round-robin, which means that atomicity
is not handled.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
meson.build | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/meson.build b/meson.build
index 5ca3cc3f34..866b8ce477 100644
--- a/meson.build
+++ b/meson.build
@@ -3176,6 +3176,9 @@ if host_os == 'windows'
endif
endif
+# Detect host pointer size for the target configuration loop.
+host_long_bits = cc.sizeof('void *') * 8
+
########################
# Target configuration #
########################
@@ -3268,11 +3271,18 @@ foreach target : target_dirs
}
endif
+ config_target += keyval.load('configs/targets' / target + '.mak')
+
target_kconfig = []
foreach sym: accelerators
if sym == 'CONFIG_TCG'
+ # Disallow 64-bit on 32-bit TCG emulation.
+ if host_long_bits < config_target['TARGET_LONG_BITS'].to_int()
+ continue
+ endif
config_target += { 'CONFIG_TCG_TARGET': 'y' }
elif target not in accelerator_targets.get(sym, [])
+ # Other accelerators are handled by accelerator_targets.
continue
endif
config_target += { sym: 'y' }
@@ -3286,9 +3296,6 @@ foreach target : target_dirs
error('No accelerator available for target @0@'.format(target))
endif
- config_target += keyval.load('configs/targets' / target + '.mak')
- config_target += { 'TARGET_' + config_target['TARGET_ARCH'].to_upper(): 'y' }
-
if 'TARGET_NEED_FDT' in config_target and not fdt.found()
if default_targets
warning('Disabling ' + target + ' due to missing libfdt')
@@ -3301,6 +3308,7 @@ foreach target : target_dirs
actual_target_dirs += target
# Add default keys
+ config_target += { 'TARGET_' + config_target['TARGET_ARCH'].to_upper(): 'y' }
if 'TARGET_BASE_ARCH' not in config_target
config_target += {'TARGET_BASE_ARCH': config_target['TARGET_ARCH']}
endif
--
2.43.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v2 12/14] meson: Disallow 64-bit on 32-bit TCG emulation
2025-02-03 3:18 ` [PATCH v2 12/14] meson: Disallow 64-bit on 32-bit TCG emulation Richard Henderson
@ 2025-02-03 10:46 ` Thomas Huth
2025-02-03 13:54 ` Alex Bennée
1 sibling, 0 replies; 62+ messages in thread
From: Thomas Huth @ 2025-02-03 10:46 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
Cc: pbonzini, mark.cave-ayland, berrange, philmd
On 03/02/2025 04.18, Richard Henderson wrote:
> For system mode, we can rarely support the amount of RAM that
> the guest requires. Emulation is restricted to round-robin
> mode, which solves many of the atomicity issues, but not those
> associated with virtio. In any case, round-robin does nothing
> to help the speed of emulation.
>
> For user mode, most emulation does not succeed at all. Most
> of the time we cannot even load 64-bit non-PIE binaries due
> to lack of a 64-bit address space. Threads are run in
> parallel, not round-robin, which means that atomicity
> is not handled.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> meson.build | 14 +++++++++++---
> 1 file changed, 11 insertions(+), 3 deletions(-)
Reviewed-by: Thomas Huth <thuth@redhat.com>
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 12/14] meson: Disallow 64-bit on 32-bit TCG emulation
2025-02-03 3:18 ` [PATCH v2 12/14] meson: Disallow 64-bit on 32-bit TCG emulation Richard Henderson
2025-02-03 10:46 ` Thomas Huth
@ 2025-02-03 13:54 ` Alex Bennée
1 sibling, 0 replies; 62+ messages in thread
From: Alex Bennée @ 2025-02-03 13:54 UTC (permalink / raw)
To: Richard Henderson
Cc: qemu-devel, pbonzini, mark.cave-ayland, berrange, philmd, thuth
Richard Henderson <richard.henderson@linaro.org> writes:
> For system mode, we can rarely support the amount of RAM that
> the guest requires. Emulation is restricted to round-robin
> mode, which solves many of the atomicity issues, but not those
> associated with virtio. In any case, round-robin does nothing
> to help the speed of emulation.
>
> For user mode, most emulation does not succeed at all. Most
> of the time we cannot even load 64-bit non-PIE binaries due
> to lack of a 64-bit address space. Threads are run in
> parallel, not round-robin, which means that atomicity
> is not handled.
I think in itself is not enough, on aarch64.ci.org:
./../configure --disable-docs --disable-tools --cross-prefix=arm-linux-gnueabihf-
Should only build 32 bit binaries. Which it does:
13:52:57 [alex@aarch64:~/l/q/b/arm32.crossbuild] review/deprecate-64-on-32-v2|… + ls qemu-*
qemu-arm qemu-keymap qemu-mipsel qemu-sh4 qemu-system-i386 qemu-system-ppc qemu-system-sparc qemu-xtensa
qemu-armeb qemu-m68k qemu-options.def qemu-sh4eb qemu-system-m68k qemu-system-riscv32 qemu-system-tricore qemu-xtensaeb
qemu-hexagon qemu-microblaze qemu-or1k qemu-sparc qemu-system-mips qemu-system-rx qemu-system-xtensa
qemu-i386 qemu-microblazeel qemu-ppc qemu-system-arm qemu-system-mipsel qemu-system-sh4 qemu-system-xtensaeb
qemu-img-cmds.h qemu-mips qemu-riscv32 qemu-system-avr qemu-system-or1k qemu-system-sh4eb qemu-version.h
However make check-tcg fails because:
13:53:09 [alex@aarch64:~/l/q/b/arm32.crossbuild] review/deprecate-64-on-32-v2|… + cat config-host.mak
# Automatically generated by configure - do not modify
all:
SRC_PATH=/home/alex/lsrc/qemu.git
TARGET_DIRS=aarch64-linux-user aarch64_be-linux-user alpha-linux-user arm-linux-user armeb-linux-user hexagon-linux-user hppa-linux-user i386-linux-user loongarch64-linux-user m68k-linux-user microblaze-linux-user microblazeel-linux-user mips-linux-user mips64-linux-user mips64el-linux-user mipsel-linux-user mipsn32-linux-user mipsn32el-linux-user or1k-linux-user ppc-linux-user ppc64-linux-user ppc64le-linux-user riscv32-linux-user riscv64-linux-user s390x-linux-user sh4-linux-user sh4eb-linux-user sparc-linux-user sparc32plus-linux-user sparc64-linux-user x86_64-linux-user xtensa-linux-user xtensaeb-linux-user aarch64-softmmu alpha-softmmu arm-softmmu avr-softmmu hppa-softmmu i386-softmmu loongarch64-softmmu m68k-softmmu microblaze-softmmu microblazeel-softmmu mips-softmmu mips64-softmmu mips64el-softmmu mipsel-softmmu or1k-softmmu ppc-softmmu ppc64-softmmu riscv32-softmmu riscv64-softmmu rx-softmmu s390x-softmmu sh4-softmmu sh4eb-softmmu sparc-softmmu sparc64-softmmu tricore-softmmu x86_64-softmmu xtensa-softmmu xtensaeb-softmmu
GDB=/usr/bin/gdb-multiarch
RUNC=docker
SUBDIRS= pc-bios/optionrom pc-bios/s390-ccw
PYTHON=/home/alex/lsrc/qemu.git/builds/arm32.crossbuild/pyvenv/bin/python3 -B
MKVENV_ENSUREGROUP=/home/alex/lsrc/qemu.git/builds/arm32.crossbuild/pyvenv/bin/python3 -B /home/alex/lsrc/qemu.git/python/scripts/mkvenv.py ensuregroup --online
GENISOIMAGE=/usr/bin/genisoimage
MESON=/home/alex/lsrc/qemu.git/builds/arm32.crossbuild/pyvenv/bin/meson
NINJA=/usr/bin/ninja
EXESUF=
CONFIG_DEFAULT_TARGETS=y
TCG_TESTS_TARGETS= aarch64-linux-user arm-linux-user i386-linux-user mips64el-linux-user mipsel-linux-user riscv64-linux-user s390x-linux-user aarch64-softmmu arm-softmmu i386-softmmu riscv64-softmmu s390x-softmmu
So possible TCG_TESTS_TARGET needs to be merged with the meson code?
Also do we still use TARGET_DIRS?
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> meson.build | 14 +++++++++++---
> 1 file changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/meson.build b/meson.build
> index 5ca3cc3f34..866b8ce477 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -3176,6 +3176,9 @@ if host_os == 'windows'
> endif
> endif
>
> +# Detect host pointer size for the target configuration loop.
> +host_long_bits = cc.sizeof('void *') * 8
> +
> ########################
> # Target configuration #
> ########################
> @@ -3268,11 +3271,18 @@ foreach target : target_dirs
> }
> endif
>
> + config_target += keyval.load('configs/targets' / target + '.mak')
> +
> target_kconfig = []
> foreach sym: accelerators
> if sym == 'CONFIG_TCG'
> + # Disallow 64-bit on 32-bit TCG emulation.
> + if host_long_bits < config_target['TARGET_LONG_BITS'].to_int()
> + continue
> + endif
> config_target += { 'CONFIG_TCG_TARGET': 'y' }
> elif target not in accelerator_targets.get(sym, [])
> + # Other accelerators are handled by accelerator_targets.
> continue
> endif
> config_target += { sym: 'y' }
> @@ -3286,9 +3296,6 @@ foreach target : target_dirs
> error('No accelerator available for target @0@'.format(target))
> endif
>
> - config_target += keyval.load('configs/targets' / target + '.mak')
> - config_target += { 'TARGET_' + config_target['TARGET_ARCH'].to_upper(): 'y' }
> -
> if 'TARGET_NEED_FDT' in config_target and not fdt.found()
> if default_targets
> warning('Disabling ' + target + ' due to missing libfdt')
> @@ -3301,6 +3308,7 @@ foreach target : target_dirs
> actual_target_dirs += target
>
> # Add default keys
> + config_target += { 'TARGET_' + config_target['TARGET_ARCH'].to_upper(): 'y' }
> if 'TARGET_BASE_ARCH' not in config_target
> config_target += {'TARGET_BASE_ARCH': config_target['TARGET_ARCH']}
> endif
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v2 13/14] meson: Deprecate 32-bit host support
2025-02-03 3:18 [PATCH v2 00/14] meson: Deprecate 32-bit host support Richard Henderson
` (11 preceding siblings ...)
2025-02-03 3:18 ` [PATCH v2 12/14] meson: Disallow 64-bit on 32-bit TCG emulation Richard Henderson
@ 2025-02-03 3:18 ` Richard Henderson
2025-02-03 10:47 ` Thomas Huth
2025-02-03 13:56 ` Alex Bennée
2025-02-03 3:18 ` [PATCH v2 14/14] tcg: Remove TCG_OVERSIZED_GUEST Richard Henderson
2025-02-03 12:54 ` [PATCH v2 00/14] meson: Deprecate 32-bit host support Paolo Bonzini
14 siblings, 2 replies; 62+ messages in thread
From: Richard Henderson @ 2025-02-03 3:18 UTC (permalink / raw)
To: qemu-devel; +Cc: pbonzini, mark.cave-ayland, berrange, philmd, thuth
We deprecated i686 system mode support for qemu 8.0. However, to
make real cleanups to TCG we need to deprecate all 32-bit hosts.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
docs/about/deprecated.rst | 7 +++++++
meson.build | 6 ++----
2 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst
index 4a3c302962..7c61d0ba16 100644
--- a/docs/about/deprecated.rst
+++ b/docs/about/deprecated.rst
@@ -204,6 +204,13 @@ is going to be so much slower it wouldn't make sense for any serious
instrumentation. Due to implementation differences there will also be
anomalies in things like memory instrumentation.
+32-bit host operating systems (since 10.0)
+''''''''''''''''''''''''''''''''''''''''''
+
+Keeping 32-bit host support alive is a substantial burden for the
+QEMU project. Thus QEMU will in future drop the support for all
+32-bit host systems.
+
System emulator CPUs
--------------------
diff --git a/meson.build b/meson.build
index 866b8ce477..0dae54da0d 100644
--- a/meson.build
+++ b/meson.build
@@ -4833,14 +4833,12 @@ if host_arch == 'unknown'
message('configure has succeeded and you can continue to build, but')
message('QEMU will use a slow interpreter to emulate the target CPU.')
endif
-elif host_arch == 'mips'
+elif host_long_bits < 64
message()
warning('DEPRECATED HOST CPU')
message()
message('Support for CPU host architecture ' + cpu + ' is going to be')
- message('dropped as soon as the QEMU project stops supporting Debian 12')
- message('("Bookworm"). Going forward, the QEMU project will not guarantee')
- message('that QEMU will compile or work on this host CPU.')
+ message('dropped in a future QEMU release.')
endif
if not supported_oses.contains(host_os)
--
2.43.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v2 13/14] meson: Deprecate 32-bit host support
2025-02-03 3:18 ` [PATCH v2 13/14] meson: Deprecate 32-bit host support Richard Henderson
@ 2025-02-03 10:47 ` Thomas Huth
2025-02-03 13:56 ` Alex Bennée
1 sibling, 0 replies; 62+ messages in thread
From: Thomas Huth @ 2025-02-03 10:47 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
Cc: pbonzini, mark.cave-ayland, berrange, philmd
On 03/02/2025 04.18, Richard Henderson wrote:
> We deprecated i686 system mode support for qemu 8.0. However, to
> make real cleanups to TCG we need to deprecate all 32-bit hosts.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> docs/about/deprecated.rst | 7 +++++++
> meson.build | 6 ++----
> 2 files changed, 9 insertions(+), 4 deletions(-)
Reviewed-by: Thomas Huth <thuth@redhat.com>
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 13/14] meson: Deprecate 32-bit host support
2025-02-03 3:18 ` [PATCH v2 13/14] meson: Deprecate 32-bit host support Richard Henderson
2025-02-03 10:47 ` Thomas Huth
@ 2025-02-03 13:56 ` Alex Bennée
1 sibling, 0 replies; 62+ messages in thread
From: Alex Bennée @ 2025-02-03 13:56 UTC (permalink / raw)
To: Richard Henderson
Cc: qemu-devel, pbonzini, mark.cave-ayland, berrange, philmd, thuth
Richard Henderson <richard.henderson@linaro.org> writes:
> We deprecated i686 system mode support for qemu 8.0. However, to
> make real cleanups to TCG we need to deprecate all 32-bit hosts.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> docs/about/deprecated.rst | 7 +++++++
> meson.build | 6 ++----
> 2 files changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst
> index 4a3c302962..7c61d0ba16 100644
> --- a/docs/about/deprecated.rst
> +++ b/docs/about/deprecated.rst
> @@ -204,6 +204,13 @@ is going to be so much slower it wouldn't make sense for any serious
> instrumentation. Due to implementation differences there will also be
> anomalies in things like memory instrumentation.
>
> +32-bit host operating systems (since 10.0)
> +''''''''''''''''''''''''''''''''''''''''''
> +
> +Keeping 32-bit host support alive is a substantial burden for the
> +QEMU project. Thus QEMU will in future drop the support for all
> +32-bit host systems.
> +
> System emulator CPUs
> --------------------
>
> diff --git a/meson.build b/meson.build
> index 866b8ce477..0dae54da0d 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -4833,14 +4833,12 @@ if host_arch == 'unknown'
> message('configure has succeeded and you can continue to build, but')
> message('QEMU will use a slow interpreter to emulate the target CPU.')
> endif
> -elif host_arch == 'mips'
> +elif host_long_bits < 64
> message()
> warning('DEPRECATED HOST CPU')
> message()
> message('Support for CPU host architecture ' + cpu + ' is going to
> be')
Support for 32 bit host architecture...?
> - message('dropped as soon as the QEMU project stops supporting Debian 12')
> - message('("Bookworm"). Going forward, the QEMU project will not guarantee')
> - message('that QEMU will compile or work on this host CPU.')
> + message('dropped in a future QEMU release.')
> endif
>
> if not supported_oses.contains(host_os)
Otherwise:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v2 14/14] tcg: Remove TCG_OVERSIZED_GUEST
2025-02-03 3:18 [PATCH v2 00/14] meson: Deprecate 32-bit host support Richard Henderson
` (12 preceding siblings ...)
2025-02-03 3:18 ` [PATCH v2 13/14] meson: Deprecate 32-bit host support Richard Henderson
@ 2025-02-03 3:18 ` Richard Henderson
2025-02-03 13:59 ` Alex Bennée
2025-02-03 12:54 ` [PATCH v2 00/14] meson: Deprecate 32-bit host support Paolo Bonzini
14 siblings, 1 reply; 62+ messages in thread
From: Richard Henderson @ 2025-02-03 3:18 UTC (permalink / raw)
To: qemu-devel; +Cc: pbonzini, mark.cave-ayland, berrange, philmd, thuth
This is now prohibited in configuration.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/qemu/atomic.h | 18 +++--------------
include/tcg/oversized-guest.h | 23 ----------------------
accel/tcg/cputlb.c | 7 -------
accel/tcg/tcg-all.c | 9 ++++-----
target/arm/ptw.c | 34 ---------------------------------
target/riscv/cpu_helper.c | 13 +------------
docs/devel/multi-thread-tcg.rst | 1 -
7 files changed, 8 insertions(+), 97 deletions(-)
delete mode 100644 include/tcg/oversized-guest.h
diff --git a/include/qemu/atomic.h b/include/qemu/atomic.h
index 7a3f2e6576..f80cba24cf 100644
--- a/include/qemu/atomic.h
+++ b/include/qemu/atomic.h
@@ -56,25 +56,13 @@
*/
#define signal_barrier() __atomic_signal_fence(__ATOMIC_SEQ_CST)
-/* Sanity check that the size of an atomic operation isn't "overly large".
+/*
+ * Sanity check that the size of an atomic operation isn't "overly large".
* Despite the fact that e.g. i686 has 64-bit atomic operations, we do not
* want to use them because we ought not need them, and this lets us do a
* bit of sanity checking that other 32-bit hosts might build.
- *
- * That said, we have a problem on 64-bit ILP32 hosts in that in order to
- * sync with TCG_OVERSIZED_GUEST, this must match TCG_TARGET_REG_BITS.
- * We'd prefer not want to pull in everything else TCG related, so handle
- * those few cases by hand.
- *
- * Note that x32 is fully detected with __x86_64__ + _ILP32, and that for
- * Sparc we always force the use of sparcv9 in configure. MIPS n32 (ILP32) &
- * n64 (LP64) ABIs are both detected using __mips64.
*/
-#if defined(__x86_64__) || defined(__sparc__) || defined(__mips64)
-# define ATOMIC_REG_SIZE 8
-#else
-# define ATOMIC_REG_SIZE sizeof(void *)
-#endif
+#define ATOMIC_REG_SIZE sizeof(void *)
/* Weak atomic operations prevent the compiler moving other
* loads/stores past the atomic operation load/store. However there is
diff --git a/include/tcg/oversized-guest.h b/include/tcg/oversized-guest.h
deleted file mode 100644
index 641b9749ff..0000000000
--- a/include/tcg/oversized-guest.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Define TCG_OVERSIZED_GUEST
- * Copyright (c) 2008 Fabrice Bellard
- */
-
-#ifndef EXEC_TCG_OVERSIZED_GUEST_H
-#define EXEC_TCG_OVERSIZED_GUEST_H
-
-#include "tcg-target-reg-bits.h"
-#include "cpu-param.h"
-
-/*
- * Oversized TCG guests make things like MTTCG hard
- * as we can't use atomics for cputlb updates.
- */
-#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
-#define TCG_OVERSIZED_GUEST 1
-#else
-#define TCG_OVERSIZED_GUEST 0
-#endif
-
-#endif
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index b4ccf0cdcb..17e2251695 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -47,7 +47,6 @@
#include "qemu/plugin-memory.h"
#endif
#include "tcg/tcg-ldst.h"
-#include "tcg/oversized-guest.h"
/* DEBUG defines, enable DEBUG_TLB_LOG to log to the CPU_LOG_MMU target */
/* #define DEBUG_TLB */
@@ -118,12 +117,8 @@ static inline uint64_t tlb_read_idx(const CPUTLBEntry *entry,
return qatomic_read(ptr);
#else
const uint64_t *ptr = &entry->addr_idx[access_type];
-# if TCG_OVERSIZED_GUEST
- return *ptr;
-# else
/* ofs might correspond to .addr_write, so use qatomic_read */
return qatomic_read(ptr);
-# endif
#endif
}
@@ -908,8 +903,6 @@ static void tlb_reset_dirty_range_locked(CPUTLBEntry *tlb_entry,
uint32_t *ptr_write = (uint32_t *)&tlb_entry->addr_write;
ptr_write += HOST_BIG_ENDIAN;
qatomic_set(ptr_write, *ptr_write | TLB_NOTDIRTY);
-#elif TCG_OVERSIZED_GUEST
- tlb_entry->addr_write |= TLB_NOTDIRTY;
#else
qatomic_set(&tlb_entry->addr_write,
tlb_entry->addr_write | TLB_NOTDIRTY);
diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c
index 95adaacee8..c1a30b0121 100644
--- a/accel/tcg/tcg-all.c
+++ b/accel/tcg/tcg-all.c
@@ -28,7 +28,6 @@
#include "exec/replay-core.h"
#include "system/cpu-timers.h"
#include "tcg/startup.h"
-#include "tcg/oversized-guest.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "qemu/accel.h"
@@ -41,6 +40,8 @@
#include "hw/boards.h"
#endif
#include "internal-common.h"
+#include "cpu-param.h"
+
struct TCGState {
AccelState parent_obj;
@@ -72,7 +73,7 @@ DECLARE_INSTANCE_CHECKER(TCGState, TCG_STATE,
static bool default_mttcg_enabled(void)
{
- if (icount_enabled() || TCG_OVERSIZED_GUEST) {
+ if (icount_enabled()) {
return false;
}
#ifdef TARGET_SUPPORTS_MTTCG
@@ -145,9 +146,7 @@ static void tcg_set_thread(Object *obj, const char *value, Error **errp)
TCGState *s = TCG_STATE(obj);
if (strcmp(value, "multi") == 0) {
- if (TCG_OVERSIZED_GUEST) {
- error_setg(errp, "No MTTCG when guest word size > hosts");
- } else if (icount_enabled()) {
+ if (icount_enabled()) {
error_setg(errp, "No MTTCG when icount is enabled");
} else {
#ifndef TARGET_SUPPORTS_MTTCG
diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index 64bb6878a4..4330900348 100644
--- a/target/arm/ptw.c
+++ b/target/arm/ptw.c
@@ -16,9 +16,6 @@
#include "internals.h"
#include "cpu-features.h"
#include "idau.h"
-#ifdef CONFIG_TCG
-# include "tcg/oversized-guest.h"
-#endif
typedef struct S1Translate {
/*
@@ -840,7 +837,6 @@ static uint64_t arm_casq_ptw(CPUARMState *env, uint64_t old_val,
ptw->out_rw = true;
}
-#ifdef CONFIG_ATOMIC64
if (ptw->out_be) {
old_val = cpu_to_be64(old_val);
new_val = cpu_to_be64(new_val);
@@ -852,36 +848,6 @@ static uint64_t arm_casq_ptw(CPUARMState *env, uint64_t old_val,
cur_val = qatomic_cmpxchg__nocheck((uint64_t *)host, old_val, new_val);
cur_val = le64_to_cpu(cur_val);
}
-#else
- /*
- * We can't support the full 64-bit atomic cmpxchg on the host.
- * Because this is only used for FEAT_HAFDBS, which is only for AA64,
- * we know that TCG_OVERSIZED_GUEST is set, which means that we are
- * running in round-robin mode and could only race with dma i/o.
- */
-#if !TCG_OVERSIZED_GUEST
-# error "Unexpected configuration"
-#endif
- bool locked = bql_locked();
- if (!locked) {
- bql_lock();
- }
- if (ptw->out_be) {
- cur_val = ldq_be_p(host);
- if (cur_val == old_val) {
- stq_be_p(host, new_val);
- }
- } else {
- cur_val = ldq_le_p(host);
- if (cur_val == old_val) {
- stq_le_p(host, new_val);
- }
- }
- if (!locked) {
- bql_unlock();
- }
-#endif
-
return cur_val;
#else
/* AArch32 does not have FEAT_HADFS; non-TCG guests only use debug-mode. */
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index e1dfc4ecbf..8ff6d900f2 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -32,7 +32,6 @@
#include "system/cpu-timers.h"
#include "cpu_bits.h"
#include "debug.h"
-#include "tcg/oversized-guest.h"
#include "pmp.h"
int riscv_env_mmu_index(CPURISCVState *env, bool ifetch)
@@ -1167,9 +1166,7 @@ static int get_physical_address(CPURISCVState *env, hwaddr *physical,
hwaddr pte_addr;
int i;
-#if !TCG_OVERSIZED_GUEST
-restart:
-#endif
+ restart:
for (i = 0; i < levels; i++, ptshift -= ptidxbits) {
target_ulong idx;
if (i == 0) {
@@ -1388,13 +1385,6 @@ restart:
false, MEMTXATTRS_UNSPECIFIED);
if (memory_region_is_ram(mr)) {
target_ulong *pte_pa = qemu_map_ram_ptr(mr->ram_block, addr1);
-#if TCG_OVERSIZED_GUEST
- /*
- * MTTCG is not enabled on oversized TCG guests so
- * page table updates do not need to be atomic
- */
- *pte_pa = pte = updated_pte;
-#else
target_ulong old_pte;
if (riscv_cpu_sxl(env) == MXL_RV32) {
old_pte = qatomic_cmpxchg((uint32_t *)pte_pa, pte, updated_pte);
@@ -1405,7 +1395,6 @@ restart:
goto restart;
}
pte = updated_pte;
-#endif
} else {
/*
* Misconfigured PTE in ROM (AD bits are not preset) or
diff --git a/docs/devel/multi-thread-tcg.rst b/docs/devel/multi-thread-tcg.rst
index 7fd0a07633..b0f473961d 100644
--- a/docs/devel/multi-thread-tcg.rst
+++ b/docs/devel/multi-thread-tcg.rst
@@ -37,7 +37,6 @@ if:
* forced by --accel tcg,thread=single
* enabling --icount mode
-* 64 bit guests on 32 bit hosts (TCG_OVERSIZED_GUEST)
In the general case of running translated code there should be no
inter-vCPU dependencies and all vCPUs should be able to run at full
--
2.43.0
^ permalink raw reply related [flat|nested] 62+ messages in thread* Re: [PATCH v2 14/14] tcg: Remove TCG_OVERSIZED_GUEST
2025-02-03 3:18 ` [PATCH v2 14/14] tcg: Remove TCG_OVERSIZED_GUEST Richard Henderson
@ 2025-02-03 13:59 ` Alex Bennée
2025-02-04 17:42 ` Richard Henderson
0 siblings, 1 reply; 62+ messages in thread
From: Alex Bennée @ 2025-02-03 13:59 UTC (permalink / raw)
To: Richard Henderson
Cc: qemu-devel, pbonzini, mark.cave-ayland, berrange, philmd, thuth
Richard Henderson <richard.henderson@linaro.org> writes:
> This is now prohibited in configuration.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
<snip>
> -#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
Is it worth keeping a compile time assert with a comment so if anyone
attempts to hack 32 bit support back in they will find out quickly?
Otherwise:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 14/14] tcg: Remove TCG_OVERSIZED_GUEST
2025-02-03 13:59 ` Alex Bennée
@ 2025-02-04 17:42 ` Richard Henderson
0 siblings, 0 replies; 62+ messages in thread
From: Richard Henderson @ 2025-02-04 17:42 UTC (permalink / raw)
To: Alex Bennée
Cc: qemu-devel, pbonzini, mark.cave-ayland, berrange, philmd, thuth
On 2/3/25 05:59, Alex Bennée wrote:
> Richard Henderson <richard.henderson@linaro.org> writes:
>
>> This is now prohibited in configuration.
>>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> <snip>
>> -#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
>
> Is it worth keeping a compile time assert with a comment so if anyone
> attempts to hack 32 bit support back in they will find out quickly?
It's there via the assert within qatomic_set().
r~
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 00/14] meson: Deprecate 32-bit host support
2025-02-03 3:18 [PATCH v2 00/14] meson: Deprecate 32-bit host support Richard Henderson
` (13 preceding siblings ...)
2025-02-03 3:18 ` [PATCH v2 14/14] tcg: Remove TCG_OVERSIZED_GUEST Richard Henderson
@ 2025-02-03 12:54 ` Paolo Bonzini
2025-02-03 21:55 ` Richard Henderson
14 siblings, 1 reply; 62+ messages in thread
From: Paolo Bonzini @ 2025-02-03 12:54 UTC (permalink / raw)
To: Richard Henderson, qemu-devel, Stefano Stabellini
Cc: mark.cave-ayland, berrange, philmd, thuth
On 2/3/25 04:18, Richard Henderson wrote:
> v1: 20250128004254.33442-1-richard.henderson@linaro.org
>
> For v2, immediately disable 64-on-32 TCG.
>
> I *suspect* that we should disable 64-on-32 for *all* accelerators.
> The idea that an i686 binary on an x86_64 host may be used to spawn
> an x86_64 guest via kvm is silly and a bit more than niche.
At least Xen used to be commonly used with 32-bit dom0, because it saved
memory and dom0 would map in guest buffers as needed. I'm not sure how
common that is these days, perhaps Stefano knows.
For KVM however I don't think anyone cares.
Paolo
> Similarly for mips32 spawning mips64 and ppc32 spawning ppc64.
>
> But in the meantime, jump through a couple of hoops to keep these
> kvm and xen cases building, while disabling tcg in the same binaries.
>
>
> Richard Henderson (14):
> meson: Drop tcg as a module
> tcg: Move stubs in tcg/perf.h to tcg/perf-stubs.c
> plugins: Uninline qemu_plugin_add_opts
> meson: Introduce CONFIG_TCG_TARGET
> tcg: Link only when required in system mode
> plugins: Link only when required in system mode
> accel/stubs: Expand stubs for TCG
> target/mips: Protect objects with CONFIG_TCG
> gitlab: Replace aarch64 with arm in cross-i686-tci build
> configure: Define TARGET_LONG_BITS in configs/targets/*.mak
> target/*: Remove TARGET_LONG_BITS from cpu-param.h
> meson: Disallow 64-bit on 32-bit TCG emulation
> meson: Deprecate 32-bit host support
> tcg: Remove TCG_OVERSIZED_GUEST
>
> include/qemu/atomic.h | 18 ++------
> include/qemu/osdep.h | 7 +++
> include/qemu/plugin.h | 9 +---
> include/tcg/oversized-guest.h | 23 ----------
> include/tcg/perf.h | 23 ----------
> target/alpha/cpu-param.h | 2 -
> target/arm/cpu-param.h | 2 -
> target/avr/cpu-param.h | 1 -
> target/hexagon/cpu-param.h | 1 -
> target/hppa/cpu-param.h | 2 -
> target/i386/cpu-param.h | 2 -
> target/loongarch/cpu-param.h | 1 -
> target/m68k/cpu-param.h | 1 -
> target/microblaze/cpu-param.h | 2 -
> target/mips/cpu-param.h | 5 ---
> target/openrisc/cpu-param.h | 1 -
> target/ppc/cpu-param.h | 2 -
> target/riscv/cpu-param.h | 2 -
> target/rx/cpu-param.h | 1 -
> target/s390x/cpu-param.h | 1 -
> target/sh4/cpu-param.h | 1 -
> target/sparc/cpu-param.h | 2 -
> target/tricore/cpu-param.h | 1 -
> target/xtensa/cpu-param.h | 1 -
> accel/stubs/tcg-stub.c | 24 ++++++++++
> accel/tcg/cputlb.c | 7 ---
> accel/tcg/tcg-all.c | 9 ++--
> plugins/loader.c | 7 ++-
> plugins/stubs.c | 49 +++++++++++++++++++++
> target/arm/ptw.c | 34 --------------
> target/riscv/cpu_helper.c | 13 +-----
> tcg/perf-stubs.c | 26 +++++++++++
> .gitlab-ci.d/crossbuilds.yml | 2 +-
> accel/tcg/meson.build | 11 ++---
> configs/targets/aarch64-bsd-user.mak | 1 +
> configs/targets/aarch64-linux-user.mak | 1 +
> configs/targets/aarch64-softmmu.mak | 1 +
> configs/targets/aarch64_be-linux-user.mak | 1 +
> configs/targets/alpha-linux-user.mak | 1 +
> configs/targets/alpha-softmmu.mak | 1 +
> configs/targets/arm-bsd-user.mak | 1 +
> configs/targets/arm-linux-user.mak | 1 +
> configs/targets/arm-softmmu.mak | 1 +
> configs/targets/armeb-linux-user.mak | 1 +
> configs/targets/avr-softmmu.mak | 1 +
> configs/targets/hexagon-linux-user.mak | 1 +
> configs/targets/hppa-linux-user.mak | 2 +
> configs/targets/hppa-softmmu.mak | 1 +
> configs/targets/i386-bsd-user.mak | 1 +
> configs/targets/i386-linux-user.mak | 1 +
> configs/targets/i386-softmmu.mak | 1 +
> configs/targets/loongarch64-linux-user.mak | 1 +
> configs/targets/loongarch64-softmmu.mak | 1 +
> configs/targets/m68k-linux-user.mak | 1 +
> configs/targets/m68k-softmmu.mak | 1 +
> configs/targets/microblaze-linux-user.mak | 1 +
> configs/targets/microblaze-softmmu.mak | 3 ++
> configs/targets/microblazeel-linux-user.mak | 1 +
> configs/targets/microblazeel-softmmu.mak | 3 ++
> configs/targets/mips-linux-user.mak | 1 +
> configs/targets/mips-softmmu.mak | 1 +
> configs/targets/mips64-linux-user.mak | 1 +
> configs/targets/mips64-softmmu.mak | 1 +
> configs/targets/mips64el-linux-user.mak | 1 +
> configs/targets/mips64el-softmmu.mak | 1 +
> configs/targets/mipsel-linux-user.mak | 1 +
> configs/targets/mipsel-softmmu.mak | 1 +
> configs/targets/mipsn32-linux-user.mak | 1 +
> configs/targets/mipsn32el-linux-user.mak | 1 +
> configs/targets/or1k-linux-user.mak | 1 +
> configs/targets/or1k-softmmu.mak | 1 +
> configs/targets/ppc-linux-user.mak | 1 +
> configs/targets/ppc-softmmu.mak | 1 +
> configs/targets/ppc64-linux-user.mak | 1 +
> configs/targets/ppc64-softmmu.mak | 1 +
> configs/targets/ppc64le-linux-user.mak | 1 +
> configs/targets/riscv32-linux-user.mak | 1 +
> configs/targets/riscv32-softmmu.mak | 1 +
> configs/targets/riscv64-bsd-user.mak | 1 +
> configs/targets/riscv64-linux-user.mak | 1 +
> configs/targets/riscv64-softmmu.mak | 1 +
> configs/targets/rx-softmmu.mak | 1 +
> configs/targets/s390x-linux-user.mak | 1 +
> configs/targets/s390x-softmmu.mak | 1 +
> configs/targets/sh4-linux-user.mak | 1 +
> configs/targets/sh4-softmmu.mak | 1 +
> configs/targets/sh4eb-linux-user.mak | 1 +
> configs/targets/sh4eb-softmmu.mak | 1 +
> configs/targets/sparc-linux-user.mak | 1 +
> configs/targets/sparc-softmmu.mak | 1 +
> configs/targets/sparc32plus-linux-user.mak | 1 +
> configs/targets/sparc64-linux-user.mak | 1 +
> configs/targets/sparc64-softmmu.mak | 1 +
> configs/targets/tricore-softmmu.mak | 1 +
> configs/targets/x86_64-bsd-user.mak | 1 +
> configs/targets/x86_64-linux-user.mak | 1 +
> configs/targets/x86_64-softmmu.mak | 1 +
> configs/targets/xtensa-linux-user.mak | 1 +
> configs/targets/xtensa-softmmu.mak | 1 +
> configs/targets/xtensaeb-linux-user.mak | 1 +
> configs/targets/xtensaeb-softmmu.mak | 1 +
> docs/about/deprecated.rst | 7 +++
> docs/devel/multi-thread-tcg.rst | 1 -
> meson.build | 47 +++++++++-----------
> plugins/meson.build | 5 ++-
> target/mips/tcg/meson.build | 4 +-
> target/mips/tcg/system/meson.build | 6 +--
> tcg/meson.build | 8 +++-
> 108 files changed, 241 insertions(+), 202 deletions(-)
> delete mode 100644 include/tcg/oversized-guest.h
> create mode 100644 plugins/stubs.c
> create mode 100644 tcg/perf-stubs.c
>
^ permalink raw reply [flat|nested] 62+ messages in thread* Re: [PATCH v2 00/14] meson: Deprecate 32-bit host support
2025-02-03 12:54 ` [PATCH v2 00/14] meson: Deprecate 32-bit host support Paolo Bonzini
@ 2025-02-03 21:55 ` Richard Henderson
2025-02-03 22:43 ` Stefano Stabellini
0 siblings, 1 reply; 62+ messages in thread
From: Richard Henderson @ 2025-02-03 21:55 UTC (permalink / raw)
To: Paolo Bonzini, qemu-devel, Stefano Stabellini
Cc: mark.cave-ayland, berrange, philmd, thuth
On 2/3/25 04:54, Paolo Bonzini wrote:
> On 2/3/25 04:18, Richard Henderson wrote:
>> v1: 20250128004254.33442-1-richard.henderson@linaro.org
>>
>> For v2, immediately disable 64-on-32 TCG.
>>
>> I *suspect* that we should disable 64-on-32 for *all* accelerators.
>> The idea that an i686 binary on an x86_64 host may be used to spawn
>> an x86_64 guest via kvm is silly and a bit more than niche.
>
> At least Xen used to be commonly used with 32-bit dom0, because it saved memory and dom0
> would map in guest buffers as needed. I'm not sure how common that is these days, perhaps
> Stefano knows.
As a data-point, debian does not ship libxen-dev for i686.
We cannot build-test this configuration at all.
I can build-test Xen for armhf, and I guess it would use i386-softmmu; it's unclear
whether x86_64-softmmu and aarch64-softmmu are relevant or useful for an armhf host, or as
an armhf binary running on an aarch64 host.
r~
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 00/14] meson: Deprecate 32-bit host support
2025-02-03 21:55 ` Richard Henderson
@ 2025-02-03 22:43 ` Stefano Stabellini
2025-02-04 8:12 ` Daniel P. Berrangé
2025-02-04 8:19 ` Juergen Gross
0 siblings, 2 replies; 62+ messages in thread
From: Stefano Stabellini @ 2025-02-03 22:43 UTC (permalink / raw)
To: Richard Henderson
Cc: Paolo Bonzini, qemu-devel, Stefano Stabellini, mark.cave-ayland,
berrange, philmd, thuth, andrew.cooper3, anthony.perard,
michal.orzel, jbeulich, julien, roger.pau, xen-devel,
bertrand.marquis
[-- Attachment #1: Type: text/plain, Size: 1624 bytes --]
+Xen maintainers
On Mon, 3 Feb 2025, Richard Henderson wrote:
> On 2/3/25 04:54, Paolo Bonzini wrote:
> > On 2/3/25 04:18, Richard Henderson wrote:
> > > v1: 20250128004254.33442-1-richard.henderson@linaro.org
> > >
> > > For v2, immediately disable 64-on-32 TCG.
> > >
> > > I *suspect* that we should disable 64-on-32 for *all* accelerators.
> > > The idea that an i686 binary on an x86_64 host may be used to spawn
> > > an x86_64 guest via kvm is silly and a bit more than niche.
> >
> > At least Xen used to be commonly used with 32-bit dom0, because it saved
> > memory and dom0 would map in guest buffers as needed. I'm not sure how
> > common that is these days, perhaps Stefano knows.
>
> As a data-point, debian does not ship libxen-dev for i686.
> We cannot build-test this configuration at all.
>
> I can build-test Xen for armhf, and I guess it would use i386-softmmu; it's
> unclear whether x86_64-softmmu and aarch64-softmmu are relevant or useful for
> an armhf host, or as an armhf binary running on an aarch64 host.
On the Xen side, there are two different use cases: x86 32-bit and ARM
32-bit.
For x86 32-bit, while it was a very important use case in the past, I
believe it is far less so now. I will let the x86 maintainers comment on
how important it is today.
For ARM 32-bit, I do not think we ever had many deployments, as most are
64-bit. Even when there are deployments, they do not typically use QEMU,
as QEMU is less important for Xen on ARM compared to x86. Therefore, I
would not block your cleanup and deprecation because of that. I will let
the other ARM maintainers chime in.
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 00/14] meson: Deprecate 32-bit host support
2025-02-03 22:43 ` Stefano Stabellini
@ 2025-02-04 8:12 ` Daniel P. Berrangé
2025-02-04 8:19 ` Juergen Gross
1 sibling, 0 replies; 62+ messages in thread
From: Daniel P. Berrangé @ 2025-02-04 8:12 UTC (permalink / raw)
To: Stefano Stabellini
Cc: Richard Henderson, Paolo Bonzini, qemu-devel, mark.cave-ayland,
philmd, thuth, andrew.cooper3, anthony.perard, michal.orzel,
jbeulich, julien, roger.pau, xen-devel, bertrand.marquis
On Mon, Feb 03, 2025 at 02:43:05PM -0800, Stefano Stabellini wrote:
> +Xen maintainers
>
>
> On Mon, 3 Feb 2025, Richard Henderson wrote:
> > On 2/3/25 04:54, Paolo Bonzini wrote:
> > > On 2/3/25 04:18, Richard Henderson wrote:
> > > > v1: 20250128004254.33442-1-richard.henderson@linaro.org
> > > >
> > > > For v2, immediately disable 64-on-32 TCG.
> > > >
> > > > I *suspect* that we should disable 64-on-32 for *all* accelerators.
> > > > The idea that an i686 binary on an x86_64 host may be used to spawn
> > > > an x86_64 guest via kvm is silly and a bit more than niche.
> > >
> > > At least Xen used to be commonly used with 32-bit dom0, because it saved
> > > memory and dom0 would map in guest buffers as needed. I'm not sure how
> > > common that is these days, perhaps Stefano knows.
> >
> > As a data-point, debian does not ship libxen-dev for i686.
> > We cannot build-test this configuration at all.
> >
> > I can build-test Xen for armhf, and I guess it would use i386-softmmu; it's
> > unclear whether x86_64-softmmu and aarch64-softmmu are relevant or useful for
> > an armhf host, or as an armhf binary running on an aarch64 host.
>
>
> On the Xen side, there are two different use cases: x86 32-bit and ARM
> 32-bit.
>
> For x86 32-bit, while it was a very important use case in the past, I
> believe it is far less so now. I will let the x86 maintainers comment on
> how important it is today.
If the Xen project needs an excuse to justify stopping 32-bit host
support, QEMU would be happy to act as the excuse :-)
With regards,
Daniel
--
|: https://berrange.com -o- https://www.flickr.com/photos/dberrange :|
|: https://libvirt.org -o- https://fstop138.berrange.com :|
|: https://entangle-photo.org -o- https://www.instagram.com/dberrange :|
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 00/14] meson: Deprecate 32-bit host support
2025-02-03 22:43 ` Stefano Stabellini
2025-02-04 8:12 ` Daniel P. Berrangé
@ 2025-02-04 8:19 ` Juergen Gross
2025-02-04 9:11 ` Jan Beulich
1 sibling, 1 reply; 62+ messages in thread
From: Juergen Gross @ 2025-02-04 8:19 UTC (permalink / raw)
To: Stefano Stabellini, Richard Henderson
Cc: Paolo Bonzini, qemu-devel, mark.cave-ayland, berrange, philmd,
thuth, andrew.cooper3, anthony.perard, michal.orzel, jbeulich,
julien, roger.pau, xen-devel, bertrand.marquis
[-- Attachment #1.1.1: Type: text/plain, Size: 1597 bytes --]
On 03.02.25 23:43, Stefano Stabellini wrote:
> +Xen maintainers
>
>
> On Mon, 3 Feb 2025, Richard Henderson wrote:
>> On 2/3/25 04:54, Paolo Bonzini wrote:
>>> On 2/3/25 04:18, Richard Henderson wrote:
>>>> v1: 20250128004254.33442-1-richard.henderson@linaro.org
>>>>
>>>> For v2, immediately disable 64-on-32 TCG.
>>>>
>>>> I *suspect* that we should disable 64-on-32 for *all* accelerators.
>>>> The idea that an i686 binary on an x86_64 host may be used to spawn
>>>> an x86_64 guest via kvm is silly and a bit more than niche.
>>>
>>> At least Xen used to be commonly used with 32-bit dom0, because it saved
>>> memory and dom0 would map in guest buffers as needed. I'm not sure how
>>> common that is these days, perhaps Stefano knows.
>>
>> As a data-point, debian does not ship libxen-dev for i686.
>> We cannot build-test this configuration at all.
>>
>> I can build-test Xen for armhf, and I guess it would use i386-softmmu; it's
>> unclear whether x86_64-softmmu and aarch64-softmmu are relevant or useful for
>> an armhf host, or as an armhf binary running on an aarch64 host.
>
>
> On the Xen side, there are two different use cases: x86 32-bit and ARM
> 32-bit.
>
> For x86 32-bit, while it was a very important use case in the past, I
> believe it is far less so now. I will let the x86 maintainers comment on
> how important it is today.
As dom0 on x86 is a PV guest per default and Linux doesn't support running as a
32-bit PV guest since a few years now, I guess there is no need to support qemu
as 32-bit on x86 for Xen.
Juergen
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^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 00/14] meson: Deprecate 32-bit host support
2025-02-04 8:19 ` Juergen Gross
@ 2025-02-04 9:11 ` Jan Beulich
2025-02-04 10:44 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 62+ messages in thread
From: Jan Beulich @ 2025-02-04 9:11 UTC (permalink / raw)
To: Juergen Gross
Cc: Paolo Bonzini, qemu-devel, mark.cave-ayland, berrange, philmd,
thuth, andrew.cooper3, anthony.perard, michal.orzel, julien,
roger.pau, xen-devel, bertrand.marquis, Stefano Stabellini,
Richard Henderson
On 04.02.2025 09:19, Juergen Gross wrote:
> On 03.02.25 23:43, Stefano Stabellini wrote:
>> +Xen maintainers
>>
>>
>> On Mon, 3 Feb 2025, Richard Henderson wrote:
>>> On 2/3/25 04:54, Paolo Bonzini wrote:
>>>> On 2/3/25 04:18, Richard Henderson wrote:
>>>>> v1: 20250128004254.33442-1-richard.henderson@linaro.org
>>>>>
>>>>> For v2, immediately disable 64-on-32 TCG.
>>>>>
>>>>> I *suspect* that we should disable 64-on-32 for *all* accelerators.
>>>>> The idea that an i686 binary on an x86_64 host may be used to spawn
>>>>> an x86_64 guest via kvm is silly and a bit more than niche.
>>>>
>>>> At least Xen used to be commonly used with 32-bit dom0, because it saved
>>>> memory and dom0 would map in guest buffers as needed. I'm not sure how
>>>> common that is these days, perhaps Stefano knows.
>>>
>>> As a data-point, debian does not ship libxen-dev for i686.
>>> We cannot build-test this configuration at all.
>>>
>>> I can build-test Xen for armhf, and I guess it would use i386-softmmu; it's
>>> unclear whether x86_64-softmmu and aarch64-softmmu are relevant or useful for
>>> an armhf host, or as an armhf binary running on an aarch64 host.
>>
>>
>> On the Xen side, there are two different use cases: x86 32-bit and ARM
>> 32-bit.
>>
>> For x86 32-bit, while it was a very important use case in the past, I
>> believe it is far less so now. I will let the x86 maintainers comment on
>> how important it is today.
>
> As dom0 on x86 is a PV guest per default and Linux doesn't support running as a
> 32-bit PV guest since a few years now, I guess there is no need to support qemu
> as 32-bit on x86 for Xen.
Yet then, just to mention it, you can run a 64-bit PV Dom0 kernel underneath
an otherwise 32-bit distro. I've been doing this successfully for very many
years (with a very small kernel adjustment, just to work around an apparent
shortcoming in system init scripts).
Jan
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 00/14] meson: Deprecate 32-bit host support
2025-02-04 9:11 ` Jan Beulich
@ 2025-02-04 10:44 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 62+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-02-04 10:44 UTC (permalink / raw)
To: Jan Beulich, Juergen Gross
Cc: Paolo Bonzini, qemu-devel, mark.cave-ayland, berrange, thuth,
andrew.cooper3, anthony.perard, michal.orzel, julien, roger.pau,
xen-devel, bertrand.marquis, Stefano Stabellini,
Richard Henderson
Hi Jan,
On 4/2/25 10:11, Jan Beulich wrote:
> On 04.02.2025 09:19, Juergen Gross wrote:
>> On 03.02.25 23:43, Stefano Stabellini wrote:
>>> +Xen maintainers
>>>
>>>
>>> On Mon, 3 Feb 2025, Richard Henderson wrote:
>>>> On 2/3/25 04:54, Paolo Bonzini wrote:
>>>>> On 2/3/25 04:18, Richard Henderson wrote:
>>>>>> v1: 20250128004254.33442-1-richard.henderson@linaro.org
>>>>>>
>>>>>> For v2, immediately disable 64-on-32 TCG.
>>>>>>
>>>>>> I *suspect* that we should disable 64-on-32 for *all* accelerators.
>>>>>> The idea that an i686 binary on an x86_64 host may be used to spawn
>>>>>> an x86_64 guest via kvm is silly and a bit more than niche.
>>>>>
>>>>> At least Xen used to be commonly used with 32-bit dom0, because it saved
>>>>> memory and dom0 would map in guest buffers as needed. I'm not sure how
>>>>> common that is these days, perhaps Stefano knows.
>>>>
>>>> As a data-point, debian does not ship libxen-dev for i686.
>>>> We cannot build-test this configuration at all.
>>>>
>>>> I can build-test Xen for armhf, and I guess it would use i386-softmmu; it's
>>>> unclear whether x86_64-softmmu and aarch64-softmmu are relevant or useful for
>>>> an armhf host, or as an armhf binary running on an aarch64 host.
>>>
>>>
>>> On the Xen side, there are two different use cases: x86 32-bit and ARM
>>> 32-bit.
>>>
>>> For x86 32-bit, while it was a very important use case in the past, I
>>> believe it is far less so now. I will let the x86 maintainers comment on
>>> how important it is today.
>>
>> As dom0 on x86 is a PV guest per default and Linux doesn't support running as a
>> 32-bit PV guest since a few years now, I guess there is no need to support qemu
>> as 32-bit on x86 for Xen.
This community disconnection between QEMU and Xen communities is a bit
unfortunate, as apparently we have been maintaining for some time
something that isn't used.
> Yet then, just to mention it, you can run a 64-bit PV Dom0 kernel underneath
> an otherwise 32-bit distro. I've been doing this successfully for very many
> years (with a very small kernel adjustment, just to work around an apparent
> shortcoming in system init scripts).
This discussion is about what is maintained by the mainstream projects.
We don't want to make fork's life harder. If you believe your use case
is worthwhile, please get it incorporated mainstream so we can test it.
Otherwise it is too much burden to maintain things we can not even test.
Regards,
Phil.
^ permalink raw reply [flat|nested] 62+ messages in thread