From: Pierrick Bouvier <pierrick.bouvier@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: mrolnik@gmail.com, philmd@linaro.org
Subject: Re: [PATCH 14/17] hw/avr: Set offset_io and increase page size to 1k
Date: Mon, 24 Mar 2025 18:21:58 -0700 [thread overview]
Message-ID: <5c19c4ac-fed9-4405-921d-42da3a4ed93c@linaro.org> (raw)
In-Reply-To: <20250323173730.3213964-15-richard.henderson@linaro.org>
On 3/23/25 10:37, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/avr/cpu-param.h | 8 +------
> hw/avr/atmega.c | 54 ++++++++++++++++++++++++++----------------
> 2 files changed, 35 insertions(+), 27 deletions(-)
>
> diff --git a/target/avr/cpu-param.h b/target/avr/cpu-param.h
> index 81f3f49ee1..f5248ce9e7 100644
> --- a/target/avr/cpu-param.h
> +++ b/target/avr/cpu-param.h
> @@ -21,13 +21,7 @@
> #ifndef AVR_CPU_PARAM_H
> #define AVR_CPU_PARAM_H
>
> -/*
> - * TARGET_PAGE_BITS cannot be more than 8 bits because
> - * 1. all IO registers occupy [0x0000 .. 0x00ff] address range, and they
> - * should be implemented as a device and not memory
> - * 2. SRAM starts at the address 0x0100
> - */
> -#define TARGET_PAGE_BITS 8
> +#define TARGET_PAGE_BITS 10
> #define TARGET_PHYS_ADDR_SPACE_BITS 24
> #define TARGET_VIRT_ADDR_SPACE_BITS 24
>
> diff --git a/hw/avr/atmega.c b/hw/avr/atmega.c
> index 273582b8af..d4fc9c4aee 100644
> --- a/hw/avr/atmega.c
> +++ b/hw/avr/atmega.c
> @@ -14,6 +14,7 @@
> #include "qapi/error.h"
> #include "exec/memory.h"
> #include "exec/address-spaces.h"
> +#include "exec/target_page.h"
> #include "system/system.h"
> #include "hw/qdev-properties.h"
> #include "hw/sysbus.h"
> @@ -222,6 +223,7 @@ static void atmega_realize(DeviceState *dev, Error **errp)
> DeviceState *cpudev;
> SysBusDevice *sbd;
> char *devname;
> + uint32_t offset_io, offset_sram;
> size_t i;
>
> assert(mc->io_size <= 0x200);
> @@ -231,13 +233,25 @@ static void atmega_realize(DeviceState *dev, Error **errp)
> return;
> }
>
> + /*
> + * Bias the virtual data section so that the start of RAM is at
> + * the start of the second page of the physical data section.
> + * This puts all of the I/O at the end of the first page of the
> + * physical data section.
> + */
> + offset_io = TARGET_PAGE_SIZE - mc->io_size;
> + offset_sram = TARGET_PAGE_SIZE;
> +
> /* CPU */
> object_initialize_child(OBJECT(dev), "cpu", &s->cpu, mc->cpu_type);
>
> object_property_set_uint(OBJECT(&s->cpu), "init-sp",
> mc->io_size + mc->sram_size - 1, &error_abort);
> object_property_set_uint(OBJECT(&s->cpu), "offset-io",
> - 0, &error_abort);
> + offset_io, &error_abort);
> +
> + offset_io += OFFSET_DATA;
> + offset_sram += OFFSET_DATA;
>
> qdev_realize(DEVICE(&s->cpu), NULL, &error_abort);
> cpudev = DEVICE(&s->cpu);
> @@ -245,8 +259,7 @@ static void atmega_realize(DeviceState *dev, Error **errp)
> /* SRAM */
> memory_region_init_ram(&s->sram, OBJECT(dev), "sram", mc->sram_size,
> &error_abort);
> - memory_region_add_subregion(get_system_memory(),
> - OFFSET_DATA + mc->io_size, &s->sram);
> + memory_region_add_subregion(get_system_memory(), offset_sram, &s->sram);
>
> /* Flash */
> memory_region_init_rom(&s->flash, OBJECT(dev),
> @@ -258,13 +271,14 @@ static void atmega_realize(DeviceState *dev, Error **errp)
> *
> * 0x00 - 0x1f: Registers
> * 0x20 - 0x5f: I/O memory
> - * 0x60 - 0xff: Extended I/O
> + * 0x60 - 0x[1]ff: Extended I/O
> */
> s->io = qdev_new(TYPE_UNIMPLEMENTED_DEVICE);
> qdev_prop_set_string(s->io, "name", "I/O");
> qdev_prop_set_uint64(s->io, "size", mc->io_size);
> sysbus_realize_and_unref(SYS_BUS_DEVICE(s->io), &error_fatal);
> - sysbus_mmio_map_overlap(SYS_BUS_DEVICE(s->io), 0, OFFSET_DATA, -1234);
> +
> + sysbus_mmio_map_overlap(SYS_BUS_DEVICE(s->io), 0, offset_io, -1234);
>
> /* Power Reduction */
> for (i = 0; i < POWER_MAX; i++) {
> @@ -277,7 +291,7 @@ static void atmega_realize(DeviceState *dev, Error **errp)
> TYPE_AVR_MASK);
> sysbus_realize(SYS_BUS_DEVICE(&s->pwr[i]), &error_abort);
> sysbus_mmio_map(SYS_BUS_DEVICE(&s->pwr[i]), 0,
> - OFFSET_DATA + mc->dev[idx].addr);
> + offset_io + mc->dev[idx].addr);
> g_free(devname);
> }
>
> @@ -289,7 +303,7 @@ static void atmega_realize(DeviceState *dev, Error **errp)
> }
> devname = g_strdup_printf("atmega-gpio-%c", 'a' + (char)i);
> create_unimplemented_device(devname,
> - OFFSET_DATA + mc->dev[idx].addr, 3);
> + offset_io + mc->dev[idx].addr, 3);
> g_free(devname);
> }
>
> @@ -305,7 +319,7 @@ static void atmega_realize(DeviceState *dev, Error **errp)
> qdev_prop_set_chr(DEVICE(&s->usart[i]), "chardev", serial_hd(i));
> sbd = SYS_BUS_DEVICE(&s->usart[i]);
> sysbus_realize(sbd, &error_abort);
> - sysbus_mmio_map(sbd, 0, OFFSET_DATA + mc->dev[USART(i)].addr);
> + sysbus_mmio_map(sbd, 0, offset_io + mc->dev[USART(i)].addr);
> connect_peripheral_irq(mc, sbd, 0, cpudev, USART_RXC_IRQ(i));
> connect_peripheral_irq(mc, sbd, 1, cpudev, USART_DRE_IRQ(i));
> connect_peripheral_irq(mc, sbd, 2, cpudev, USART_TXC_IRQ(i));
> @@ -321,12 +335,12 @@ static void atmega_realize(DeviceState *dev, Error **errp)
> }
> if (!mc->dev[idx].is_timer16) {
> create_unimplemented_device("avr-timer8",
> - OFFSET_DATA + mc->dev[idx].addr, 5);
> + offset_io + mc->dev[idx].addr, 5);
> create_unimplemented_device("avr-timer8-intmask",
> - OFFSET_DATA
> + offset_io
> + mc->dev[idx].intmask_addr, 1);
> create_unimplemented_device("avr-timer8-intflag",
> - OFFSET_DATA
> + offset_io
> + mc->dev[idx].intflag_addr, 1);
> continue;
> }
> @@ -337,9 +351,9 @@ static void atmega_realize(DeviceState *dev, Error **errp)
> s->xtal_freq_hz, &error_abort);
> sbd = SYS_BUS_DEVICE(&s->timer[i]);
> sysbus_realize(sbd, &error_abort);
> - sysbus_mmio_map(sbd, 0, OFFSET_DATA + mc->dev[idx].addr);
> - sysbus_mmio_map(sbd, 1, OFFSET_DATA + mc->dev[idx].intmask_addr);
> - sysbus_mmio_map(sbd, 2, OFFSET_DATA + mc->dev[idx].intflag_addr);
> + sysbus_mmio_map(sbd, 0, offset_io + mc->dev[idx].addr);
> + sysbus_mmio_map(sbd, 1, offset_io + mc->dev[idx].intmask_addr);
> + sysbus_mmio_map(sbd, 2, offset_io + mc->dev[idx].intflag_addr);
> connect_peripheral_irq(mc, sbd, 0, cpudev, TIMER_CAPT_IRQ(i));
> connect_peripheral_irq(mc, sbd, 1, cpudev, TIMER_COMPA_IRQ(i));
> connect_peripheral_irq(mc, sbd, 2, cpudev, TIMER_COMPB_IRQ(i));
> @@ -349,12 +363,12 @@ static void atmega_realize(DeviceState *dev, Error **errp)
> g_free(devname);
> }
>
> - create_unimplemented_device("avr-twi", OFFSET_DATA + 0x0b8, 6);
> - create_unimplemented_device("avr-adc", OFFSET_DATA + 0x078, 8);
> - create_unimplemented_device("avr-ext-mem-ctrl", OFFSET_DATA + 0x074, 2);
> - create_unimplemented_device("avr-watchdog", OFFSET_DATA + 0x060, 1);
> - create_unimplemented_device("avr-spi", OFFSET_DATA + 0x04c, 3);
> - create_unimplemented_device("avr-eeprom", OFFSET_DATA + 0x03f, 3);
> + create_unimplemented_device("avr-twi", offset_io + 0x0b8, 6);
> + create_unimplemented_device("avr-adc", offset_io + 0x078, 8);
> + create_unimplemented_device("avr-ext-mem-ctrl", offset_io + 0x074, 2);
> + create_unimplemented_device("avr-watchdog", offset_io + 0x060, 1);
> + create_unimplemented_device("avr-spi", offset_io + 0x04c, 3);
> + create_unimplemented_device("avr-eeprom", offset_io + 0x03f, 3);
> }
>
> static const Property atmega_props[] = {
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
next prev parent reply other threads:[~2025-03-25 1:39 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-23 17:37 [PATCH 00/17] target/avr: Increase page size Richard Henderson
2025-03-23 17:37 ` [PATCH 01/17] hw/core/cpu: Use size_t for memory_rw_debug len argument Richard Henderson
2025-03-23 21:25 ` Philippe Mathieu-Daudé
2025-03-25 0:43 ` Pierrick Bouvier
2025-03-23 17:37 ` [PATCH 02/17] target/avr: Fix buffer read in avr_print_insn Richard Henderson
2025-03-25 0:52 ` Pierrick Bouvier
2025-03-23 17:37 ` [PATCH 03/17] target/avr: Improve decode of LDS, STS Richard Henderson
2025-03-25 0:53 ` Pierrick Bouvier
2025-03-23 17:37 ` [PATCH 04/17] target/avr: Remove OFFSET_CPU_REGISTERS Richard Henderson
2025-03-23 21:27 ` Philippe Mathieu-Daudé
2025-03-25 0:55 ` Pierrick Bouvier
2025-03-23 17:37 ` [PATCH 05/17] target/avr: Move cpu register accesses into system memory Richard Henderson
2025-03-25 1:07 ` Pierrick Bouvier
2025-03-25 13:48 ` Richard Henderson
2025-03-25 14:34 ` Pierrick Bouvier
2025-03-23 17:37 ` [PATCH 06/17] target/avr: Use cpu_stb_mmuidx_ra in helper_fullwr Richard Henderson
2025-03-25 1:08 ` Pierrick Bouvier
2025-03-23 17:37 ` [PATCH 07/17] target/avr: Use do_stb in avr_cpu_do_interrupt Richard Henderson
2025-03-23 21:31 ` Philippe Mathieu-Daudé
2025-03-25 1:09 ` Pierrick Bouvier
2025-03-23 17:37 ` [PATCH 08/17] target/avr: Add offset-io cpu property Richard Henderson
2025-03-25 1:10 ` Pierrick Bouvier
2025-03-23 17:37 ` [PATCH 09/17] target/avr: Introduce gen_data_{load,store}_raw Richard Henderson
2025-03-25 1:12 ` Pierrick Bouvier
2025-03-23 17:37 ` [PATCH 10/17] target/avr: Update cpu_sp after push and pop Richard Henderson
2025-03-25 1:36 ` Pierrick Bouvier
2025-03-23 17:37 ` [PATCH 11/17] target/avr: Implement CPUState.memory_rw_debug Richard Henderson
2025-03-23 21:33 ` Philippe Mathieu-Daudé
2025-03-25 1:19 ` Pierrick Bouvier
2025-03-23 17:37 ` [PATCH 12/17] target/avr: Handle offset_io in helper.c Richard Henderson
2025-03-23 21:34 ` Philippe Mathieu-Daudé
2025-03-25 1:20 ` Pierrick Bouvier
2025-03-23 17:37 ` [PATCH 13/17] target/avr: Handle offset_io in avr_cpu_realizefn Richard Henderson
2025-03-23 21:35 ` Philippe Mathieu-Daudé
2025-03-23 21:38 ` Philippe Mathieu-Daudé
2025-03-25 1:20 ` Pierrick Bouvier
2025-03-23 17:37 ` [PATCH 14/17] hw/avr: Set offset_io and increase page size to 1k Richard Henderson
2025-03-25 1:21 ` Pierrick Bouvier [this message]
2025-03-23 17:37 ` [PATCH 15/17] hw/avr: Pass mcu_type to class_base_init via .class_data Richard Henderson
2025-03-23 21:38 ` Philippe Mathieu-Daudé
2025-03-25 1:25 ` Pierrick Bouvier
2025-03-23 17:37 ` [PATCH 16/17] hw/avr: Move AtmegaMcuClass to atmega.h Richard Henderson
2025-03-25 1:22 ` Pierrick Bouvier
2025-03-23 17:37 ` [PATCH 17/17] target/avr: Enable TARGET_PAGE_BITS_VARY Richard Henderson
2025-03-25 1:24 ` Pierrick Bouvier
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