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Sat, 26 Oct 2024 08:30:16 -0700 (PDT) Message-ID: <5c894c2c-0b63-4b18-8c6c-07e65e703cae@linaro.org> Date: Sat, 26 Oct 2024 12:30:13 -0300 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 7/7] target/mips: Convert Loongson [D]MULT[U].G opcodes to decodetree To: Richard Henderson , qemu-devel@nongnu.org Cc: Jiaxun Yang , Aurelien Jarno , Aleksandar Rikalo , =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= References: <20230831203024.87300-1-philmd@linaro.org> <20230831203024.87300-8-philmd@linaro.org> <47fa4915-4bc9-665a-5679-4dafc03a5c62@linaro.org> Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <47fa4915-4bc9-665a-5679-4dafc03a5c62@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::52b; envelope-from=philmd@linaro.org; helo=mail-pg1-x52b.google.com X-Spam_score_int: 12 X-Spam_score: 1.2 X-Spam_bar: + X-Spam_report: (1.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_SBL_CSS=3.335, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 31/8/23 21:29, Richard Henderson wrote: > On 8/31/23 13:30, Philippe Mathieu-Daudé wrote: >> From: Philippe Mathieu-Daudé >> >> Convert the following opcodes to decodetree: >> >> - MULT.G - multiply 32-bit signed integers >> - MULTU.G - multiply 32-bit unsigned integers >> - DMULT.G - multiply 64-bit signed integers >> - DMULTU.G - multiply 64-bit unsigned integers >> >> Now that all opcodes from the extension have been converted, we >> can remove completely gen_loongson_integer() and its 2 calls in >> decode_opc_special2_legacy() and decode_opc_special3_legacy(). >> >> Signed-off-by: Philippe Mathieu-Daudé > > Reviewed-by: Richard Henderson > > >> +    if (is_double) { >> +        if (TARGET_LONG_BITS != 64) { >> +            return false; >> +        } >> +        check_mips_64(s); >> +    } > > This preserves existing behaviour vs > >> -#if defined(TARGET_MIPS64) >> -    case OPC_DMULT_G_2E: >> -    case OPC_DMULT_G_2F: >> -        tcg_gen_mul_tl(cpu_gpr[rd], t0, t1); >> -        break; >> -    case OPC_DMULTU_G_2E: >> -    case OPC_DMULTU_G_2F: >> -        tcg_gen_mul_tl(cpu_gpr[rd], t0, t1); >> -        break; >> -#endif > > this ifdef.  But it doesn't seem quite right. > > It's a behaviour change between qemu-system-mips and qemu-system-mips64 > for the same cpu. Returning false allows another insn to match instead. > But we have identified the insn, it just isn't legal. Indeed. > Anyway, aren't all of these loongson cpus 64-bit? The Loongson-1 cores family is 32-bit but AFAICT it doesn't implement the Loongson Extension, which appeared with the Loongson-2 family, which is 64-bit. QEMU only implement the Loongson-2/3 families, both 64-bit. I'll post a cleanup patch on top, since this series is already fully reviewed. Thanks! Phil.