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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a1c828f5fsm41382990f8f.8.2025.01.03.07.08.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 03 Jan 2025 07:08:30 -0800 (PST) Message-ID: <5d19a266-fb17-4143-b701-01740ce0c705@linaro.org> Date: Fri, 3 Jan 2025 16:08:28 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 4/4] tests/qtest/boot-serial-test: Initialize PL011 Control register To: Fabiano Rosas , qemu-devel@nongnu.org Cc: =?UTF-8?Q?Alex_Benn=C3=A9e?= , Paolo Bonzini , Laurent Vivier , Peter Maydell , qemu-arm@nongnu.org References: <20250102105822.43532-1-philmd@linaro.org> <20250102105822.43532-5-philmd@linaro.org> <878qrs7xhy.fsf@suse.de> Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <878qrs7xhy.fsf@suse.de> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=philmd@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 3/1/25 16:00, Fabiano Rosas wrote: > Philippe Mathieu-Daudé writes: > >> The tests using the PL011 UART of the virt and raspi machines >> weren't properly enabling the UART and its transmitter previous >> to sending characters. Follow the PL011 manual initialization >> recommendation by setting the proper bits of the control register. >> >> Update the ASM code prefixing: >> >> *UART_CTRL = UART_ENABLE | TX_ENABLE; >> >> to: >> >> while (true) { >> *UART_DATA = 'T'; >> } >> >> Note, since commit 51b61dd4d56 ("hw/char/pl011: Warn when using >> disabled transmitter") incomplete PL011 initialization can be >> logged using the '-d guest_errors' command line option. >> >> Signed-off-by: Philippe Mathieu-Daudé >> --- >> tests/qtest/boot-serial-test.c | 7 ++++++- >> 1 file changed, 6 insertions(+), 1 deletion(-) >> >> diff --git a/tests/qtest/boot-serial-test.c b/tests/qtest/boot-serial-test.c >> index bcfa504826c..6ea7e62e076 100644 >> --- a/tests/qtest/boot-serial-test.c >> +++ b/tests/qtest/boot-serial-test.c >> @@ -70,15 +70,20 @@ static const uint8_t kernel_plml605[] = { >> }; >> >> static const uint8_t bios_raspi2[] = { >> - 0x08, 0x30, 0x9f, 0xe5, /* ldr r3, [pc, #8] Get &UART0 */ >> + 0x10, 0x30, 0x9f, 0xe5, /* ldr r3, [pc, #8] Get &UART0 */ > > The comment needs updating, no? Oops indeed, good catch :) "ldr r3, [pc, #16]" > >> + 0x10, 0x20, 0x9f, 0xe5, /* ldr r2, [pc, #8] Get &CR */ >> + 0xb0, 0x23, 0xc3, 0xe1, /* strh r2, [r3, #48] Set CR */ >> 0x54, 0x20, 0xa0, 0xe3, /* mov r2, #'T' */ >> 0x00, 0x20, 0xc3, 0xe5, /* loop: strb r2, [r3] *TXDAT = 'T' */ >> 0xff, 0xff, 0xff, 0xea, /* b -4 (loop) */ >> 0x00, 0x10, 0x20, 0x3f, /* UART0: 0x3f201000 */ >> + 0x01, 0x01, 0x00, 0x00, /* CR: 0x101 = UARTEN|TXE */ >> }; >> >> static const uint8_t kernel_aarch64[] = { >> 0x02, 0x20, 0xa1, 0xd2, /* mov x2, #0x9000000 Load UART0 */ >> + 0x21, 0x20, 0x80, 0x52, /* mov w1, 0x101 CR = UARTEN|TXE */ >> + 0x41, 0x60, 0x00, 0x79, /* strh w1, [x2, #48] Set CR */ >> 0x81, 0x0a, 0x80, 0x52, /* mov w1, #'T' */ >> 0x41, 0x00, 0x00, 0x39, /* loop: strb w1, [x2] *TXDAT = 'T' */ >> 0xff, 0xff, 0xff, 0x17, /* b -4 (loop) */