From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1N0EST-00046T-Dj for qemu-devel@nongnu.org; Tue, 20 Oct 2009 09:09:01 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1N0ESO-00045t-3G for qemu-devel@nongnu.org; Tue, 20 Oct 2009 09:09:00 -0400 Received: from [199.232.76.173] (port=40660 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1N0ESN-00045q-UZ for qemu-devel@nongnu.org; Tue, 20 Oct 2009 09:08:55 -0400 Received: from mail-ew0-f221.google.com ([209.85.219.221]:50640) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1N0ESN-0000x5-Bz for qemu-devel@nongnu.org; Tue, 20 Oct 2009 09:08:55 -0400 Received: by mail-ew0-f221.google.com with SMTP id 21so4020503ewy.8 for ; Tue, 20 Oct 2009 06:08:55 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <20091014143042.GD8092@mothafucka.localdomain> References: <20091014143042.GD8092@mothafucka.localdomain> Date: Tue, 20 Oct 2009 11:08:54 -0200 Message-ID: <5d6222a80910200608r58568784ra383189f5b8d88b2@mail.gmail.com> Subject: Re: [Qemu-devel] [RFC] in-kernel irqchip : split devices From: Glauber Costa Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Glauber Costa Cc: qemu-devel@nongnu.org, avi@redhat.com Specially Avi, comments on this one? 2009/10/14 Glauber Costa : > Hello people, > > As I promised, I am sending a very brief PoC wrt split devices and in-ker= nel irqchip. > In this mail, I am including only the ioapic version for apreciation. I a= lso have i8259, > and apic will take me a little bit more. This is just to try to bind the = discussion to real > code. > > Note that we end up with a very slim representation of the device, and th= e code is much less > confusing, IMHO. > > > > Index: qemu/Makefile.target > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > --- qemu.orig/Makefile.target > +++ qemu/Makefile.target > @@ -197,6 +197,8 @@ obj-i386-y +=3D usb-uhci.o vmmouse.o vmpor > =C2=A0obj-i386-y +=3D device-hotplug.o pci-hotplug.o smbios.o wdt_ib700.o > =C2=A0obj-i386-y +=3D ne2000-isa.o > > +obj-i386-$(CONFIG_KVM) +=3D ioapic-kvm.o > + > =C2=A0# shared objects > =C2=A0obj-ppc-y =3D ppc.o ide/core.o ide/qdev.o ide/isa.o ide/pci.o ide/m= acio.o > =C2=A0obj-ppc-y +=3D vga.o vga-pci.o $(sound-obj-y) dma.o openpic.o > Index: qemu/hw/ioapic-kvm.c > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > --- /dev/null > +++ qemu/hw/ioapic-kvm.c > @@ -0,0 +1,81 @@ > +#include "hw.h" > +#include "pc.h" > +#include "qemu-timer.h" > +#include "host-utils.h" > +#include "kvm.h" > + > +#define IOAPIC_NUM_PINS =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A00x18 > +#define IOAPIC_DEFAULT_BASE_ADDRESS =C2=A00xfec00000 > + > +static void ioapic_reset(void *opaque) > +{ > + =C2=A0 =C2=A0struct kvm_ioapic_state *s =3D opaque; > + =C2=A0 =C2=A0struct kvm_irqchip *chip; > + =C2=A0 =C2=A0int i; > + > + =C2=A0 =C2=A0chip =3D container_of(s, struct kvm_irqchip, chip.ioapic); > + > + =C2=A0 =C2=A0chip->chip_id =3D KVM_IRQCHIP_IOAPIC; > + > + =C2=A0 =C2=A0memset(s, 0, sizeof(*s)); > + =C2=A0 =C2=A0s->base_address =3D IOAPIC_DEFAULT_BASE_ADDRESS; > + =C2=A0 =C2=A0for(i =3D 0; i < IOAPIC_NUM_PINS; i++) > + =C2=A0 =C2=A0 =C2=A0 =C2=A0s->redirtbl[i].bits =3D 1 << 16; /* mask LVT= */ > + > + =C2=A0 =C2=A0kvm_set_irqchip(chip); > +} > + > +static void ioapic_pre_save(void *opaque) > +{ > + =C2=A0 =C2=A0struct kvm_ioapic_state *s =3D opaque; > + =C2=A0 =C2=A0struct kvm_irqchip *chip; > + > + =C2=A0 =C2=A0chip =3D container_of(s, struct kvm_irqchip, chip.ioapic); > + > + =C2=A0 =C2=A0kvm_get_irqchip(chip); > +} > + > +static int ioapic_post_load(void *opaque, int version_id) > +{ > + =C2=A0 =C2=A0struct kvm_ioapic_state *s =3D opaque; > + =C2=A0 =C2=A0struct kvm_irqchip *chip; > + > + =C2=A0 =C2=A0chip =3D container_of(s, struct kvm_irqchip, chip.ioapic); > + > + =C2=A0 =C2=A0return kvm_set_irqchip(chip); > +} > + > +static const VMStateDescription vmstate_kvm_ioapic =3D { > + =C2=A0 =C2=A0.name =3D "ioapic-kvm", > + =C2=A0 =C2=A0.version_id =3D 1, > + =C2=A0 =C2=A0.minimum_version_id =3D 1, > + =C2=A0 =C2=A0.post_load =3D ioapic_post_load, > + =C2=A0 =C2=A0.pre_save =3D ioapic_pre_save, > + =C2=A0 =C2=A0.fields =C2=A0 =C2=A0 =C2=A0=3D (VMStateField []) { > + =C2=A0 =C2=A0 =C2=A0 =C2=A0VMSTATE_U64(base_address, struct kvm_ioapic_= state), > + =C2=A0 =C2=A0 =C2=A0 =C2=A0VMSTATE_UINT32(id, struct kvm_ioapic_state), > + =C2=A0 =C2=A0 =C2=A0 =C2=A0VMSTATE_UINT32(ioregsel, struct kvm_ioapic_s= tate), > + =C2=A0 =C2=A0 =C2=A0 =C2=A0VMSTATE_UINT32(irr, struct kvm_ioapic_state)= , > + =C2=A0 =C2=A0 =C2=A0 =C2=A0VMSTATE_ARRAY_UNSAFE(redirtbl, struct kvm_io= apic_state, IOAPIC_NUM_PINS, 0, vmstate_info_u64, __u64), > + =C2=A0 =C2=A0 =C2=A0 =C2=A0VMSTATE_END_OF_LIST() > + =C2=A0 =C2=A0} > +}; > + > + > +static void kvm_ioapic_set_irq(void *opaque, int vector, int level) > +{ > +} > + > +qemu_irq *kvm_ioapic_init(void) > +{ > + =C2=A0 =C2=A0struct kvm_irqchip *s; > + > + =C2=A0 =C2=A0s =3D qemu_mallocz(sizeof(*s)); > + > + =C2=A0 =C2=A0ioapic_reset(&s->chip.ioapic); > + > + =C2=A0 =C2=A0vmstate_register(0, &vmstate_kvm_ioapic, &s->chip.ioapic); > + =C2=A0 =C2=A0qemu_register_reset(ioapic_reset, &s->chip.ioapic); > + > + =C2=A0 =C2=A0return qemu_allocate_irqs(kvm_ioapic_set_irq, &s->chip.ioa= pic, IOAPIC_NUM_PINS); > +} > Index: qemu/hw/pc.h > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > --- qemu.orig/hw/pc.h > +++ qemu/hw/pc.h > @@ -48,6 +48,8 @@ void ioapic_set_irq(void *opaque, int ve > =C2=A0void apic_reset_irq_delivered(void); > =C2=A0int apic_get_irq_delivered(void); > > +qemu_irq *kvm_ioapic_init(void); > + > =C2=A0/* i8254.c */ > > =C2=A0#define PIT_FREQ 1193182 > Index: qemu/kvm-all.c > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > --- qemu.orig/kvm-all.c > +++ qemu/kvm-all.c > @@ -411,6 +411,26 @@ int kvm_check_extension(KVMState *s, uns > =C2=A0 =C2=A0 return ret; > =C2=A0} > > +#ifdef KVM_CAP_IRQCHIP > +int kvm_set_irqchip(struct kvm_irqchip *chip) > +{ > + =C2=A0 =C2=A0if (!kvm_state->irqchip_in_kernel) { > + =C2=A0 =C2=A0 =C2=A0 =C2=A0return 0; > + =C2=A0 =C2=A0} > + > + =C2=A0 =C2=A0return kvm_vm_ioctl(kvm_state, KVM_SET_IRQCHIP, chip); > +} > + > +int kvm_get_irqchip(struct kvm_irqchip *chip) > +{ > + =C2=A0 =C2=A0if (!kvm_state->irqchip_in_kernel) { > + =C2=A0 =C2=A0 =C2=A0 =C2=A0return 0; > + =C2=A0 =C2=A0} > + > + =C2=A0 =C2=A0return kvm_vm_ioctl(kvm_state, KVM_GET_IRQCHIP, chip); > +} > +#endif > + > =C2=A0int kvm_init(int smp_cpus) > =C2=A0{ > =C2=A0 =C2=A0 static const char upgrade_note[] =3D > Index: qemu/kvm.h > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > --- qemu.orig/kvm.h > +++ qemu/kvm.h > @@ -16,6 +16,7 @@ > > =C2=A0#include "config.h" > =C2=A0#include "qemu-queue.h" > +#include > > =C2=A0#ifdef CONFIG_KVM > =C2=A0extern int kvm_allowed; > @@ -63,6 +64,9 @@ int kvm_update_guest_debug(CPUState *env > =C2=A0int kvm_pit_in_kernel(void); > =C2=A0int kvm_irqchip_in_kernel(void); > > +int kvm_set_irqchip(struct kvm_irqchip *chip); > +int kvm_get_irqchip(struct kvm_irqchip *chip); > + > =C2=A0/* internal API */ > > =C2=A0struct KVMState; > > --=20 Glauber Costa. "Free as in Freedom" http://glommer.net "The less confident you are, the more serious you have to act."