Re: [PATCH v6 04/33] hw/arm/smmu-common: Make iommu ops part of SMMUState

["Cédric Le Goater" <clg@redhat.com>]

Hello Shameer,


On 11/20/25 14:21, Shameer Kolothum wrote:
> Make iommu ops part of SMMUState and set to the current default smmu_ops.
> No functional change intended. This will allow SMMUv3 accel implementation
> to set a different iommu ops later.

Hmm, shouldn't this be a class attribute instead ? I will check the rest
of the series.

C.

> 
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
> Reviewed-by: Eric Auger <eric.auger@redhat.com>
> Tested-by: Zhangfei Gao <zhangfei.gao@linaro.org>
> Signed-off-by: Shameer Kolothum <skolothumtho@nvidia.com>
> ---
>   hw/arm/smmu-common.c         | 7 +++++--
>   include/hw/arm/smmu-common.h | 1 +
>   2 files changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c
> index 59d6147ec9..4d6516443e 100644
> --- a/hw/arm/smmu-common.c
> +++ b/hw/arm/smmu-common.c
> @@ -952,6 +952,9 @@ static void smmu_base_realize(DeviceState *dev, Error **errp)
>           return;
>       }
>   
> +    if (!s->iommu_ops) {
> +        s->iommu_ops = &smmu_ops;
> +    }>       /*
>        * We only allow default PCIe Root Complex(pcie.0) or pxb-pcie based extra
>        * root complexes to be associated with SMMU.
> @@ -971,9 +974,9 @@ static void smmu_base_realize(DeviceState *dev, Error **errp)
>           }
>   
>           if (s->smmu_per_bus) {
> -            pci_setup_iommu_per_bus(pci_bus, &smmu_ops, s);
> +            pci_setup_iommu_per_bus(pci_bus, s->iommu_ops, s);
>           } else {
> -            pci_setup_iommu(pci_bus, &smmu_ops, s);
> +            pci_setup_iommu(pci_bus, s->iommu_ops, s);
>           }
>           return;
>       }
> diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h
> index d307ddd952..eebf2f49e2 100644
> --- a/include/hw/arm/smmu-common.h
> +++ b/include/hw/arm/smmu-common.h
> @@ -162,6 +162,7 @@ struct SMMUState {
>       uint8_t bus_num;
>       PCIBus *primary_bus;
>       bool smmu_per_bus; /* SMMU is specific to the primary_bus */
> +    const PCIIOMMUOps *iommu_ops;
>   };
>   
>   struct SMMUBaseClass {