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From: Richard Henderson <richard.henderson@linaro.org>
To: "Wu, Fei" <fei2.wu@intel.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	Bin Meng <bin.meng@windriver.com>,
	Weiwei Li <liweiwei@iscas.ac.cn>,
	Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
	Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
	"open list:RISC-V TCG CPUs" <qemu-riscv@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>
Subject: Re: [PATCH v3] target/riscv: reduce overhead of MSTATUS_SUM change
Date: Thu, 23 Mar 2023 09:11:35 -0700	[thread overview]
Message-ID: <5e93efee-843c-74b4-0b36-fcf89d8d3463@linaro.org> (raw)
In-Reply-To: <4c0c210b-7a9a-34a8-b0c2-e32f9328bf07@intel.com>

On 3/22/23 17:38, Wu, Fei wrote:
> There is MSTATUS_MPRV and MSTATUS_MPP kind of thing, priv+sum is not
> able to represent all of the status, probably we can just add an extra
> 'priv' at the back of TB_FLAGS?

Yes, I think that's required.


r~


      parent reply	other threads:[~2023-03-23 16:11 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-22 12:12 [PATCH v3] target/riscv: reduce overhead of MSTATUS_SUM change Fei Wu
2023-03-22 12:37 ` liweiwei
2023-03-22 13:12   ` Wu, Fei
2023-03-22 13:19 ` Richard Henderson
2023-03-23  0:38   ` Wu, Fei
2023-03-23  1:26     ` Wu, Fei
2023-03-23 13:24     ` Wu, Fei
2023-03-23 16:41       ` Richard Henderson
2023-03-23 16:11     ` Richard Henderson [this message]

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