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From: Richard Henderson <richard.henderson@linaro.org>
To: Luc Michel <lmichel@kalray.eu>, qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>
Subject: Re: [PATCH] accel/tcg/cpu-exec: fix precise single-stepping after interrupt
Date: Thu, 24 Feb 2022 14:52:07 -1000	[thread overview]
Message-ID: <5ec03bd3-f077-83cc-7fb1-fcfa4b991668@linaro.org> (raw)
In-Reply-To: <cf2e9636-5824-d96d-9a4f-60c677edbbbe@linaro.org>

On 2/24/22 14:23, Richard Henderson wrote:
> On 2/14/22 03:26, Luc Michel wrote:
>> In some cases, cpu->exit_request can be false after handling the
>> interrupt, leading to another TB being executed instead of returning
>> to the main loop.
>>
>> Fix this by returning true unconditionally when in single-step mode.
>>
>> Fixes: ba3c35d9c4026361fd380b269dc6def9510b7166
>>
>> Signed-off-by: Luc Michel <lmichel@kalray.eu>
>> ---
>> Coming back on this issue I worked on with Richard in 2020. The issue is
>> that when debugging the guest with GDB, the first instruction of the IRQ
>> handler is missed by GDB (it's still executed though).
>>
>> It happened to me again in TCG RR mode (but not in MTTCG). It seems that
>> cpu->exit_request can be false in RR mode when returning from
>> cc->tcg_ops->cpu_exec_interrupt, leading to cpu_handle_interrupt
>> returning false and the next TB being executed, instead of the EXCP_DEBUG
>> being handled.
>> ---
>>   accel/tcg/cpu-exec.c | 10 +++++++---
>>   1 file changed, 7 insertions(+), 3 deletions(-)
>>
>> diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
>> index 8b4cd6c59d..74d7f83f34 100644
>> --- a/accel/tcg/cpu-exec.c
>> +++ b/accel/tcg/cpu-exec.c
>> @@ -796,13 +796,17 @@ static inline bool cpu_handle_interrupt(CPUState *cpu,
>>                   /*
>>                    * After processing the interrupt, ensure an EXCP_DEBUG is
>>                    * raised when single-stepping so that GDB doesn't miss the
>>                    * next instruction.
>>                    */
>> -                cpu->exception_index =
>> -                    (cpu->singlestep_enabled ? EXCP_DEBUG : -1);
>> -                *last_tb = NULL;
>> +                if (unlikely(cpu->singlestep_enabled)) {
>> +                    cpu->exception_index = EXCP_DEBUG;
>> +                    return true;
> 
> By returning here, you also need to qemu_mutex_unlock_iothread().
> 
>> +                } else {
> 
> You can remove the else after the return.
> Otherwise this looks good; sorry for the delay.

I'll just fix this up when applying, it's minor enough.

r~


  reply	other threads:[~2022-02-25  0:54 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-14 13:26 [PATCH] accel/tcg/cpu-exec: fix precise single-stepping after interrupt Luc Michel
2022-02-23 10:51 ` Luc Michel
2022-02-25  0:23 ` Richard Henderson
2022-02-25  0:52   ` Richard Henderson [this message]
  -- strict thread matches above, loose matches on Subject: below --
2022-06-20 14:24 [PATCH 0/7] semihosting: proper QEMU exit on semihosted exit syscall Luc Michel
2022-06-20 14:24 ` [PATCH] accel/tcg/cpu-exec: fix precise single-stepping after interrupt Luc Michel
2022-06-20 14:27   ` Luc Michel

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