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([2804:431:c7c6:367f:eb9c:8725:6b7f:76b3]) by smtp.gmail.com with ESMTPSA id d1sm10934844otk.70.2022.02.14.09.52.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 14 Feb 2022 09:52:20 -0800 (PST) Message-ID: <5ef3cc27-38f0-5a30-5c6b-ce9d61c9f266@gmail.com> Date: Mon, 14 Feb 2022 14:52:17 -0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH v11 3/4] target/ppc: add PPC_INTERRUPT_EBB and EBB exceptions Content-Language: en-US To: =?UTF-8?Q?C=c3=a9dric_Le_Goater?= , qemu-devel@nongnu.org References: <20220211183354.563602-1-danielhb413@gmail.com> <20220211183354.563602-4-danielhb413@gmail.com> From: Daniel Henrique Barboza In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::336 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::336; envelope-from=danielhb413@gmail.com; helo=mail-ot1-x336.google.com X-Spam_score_int: -3 X-Spam_score: -0.4 X-Spam_bar: / X-Spam_report: (-0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, NICE_REPLY_A=-0.001, PDS_HP_HELO_NORDNS=0.635, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 2/14/22 14:34, Cédric Le Goater wrote: > On 2/11/22 19:33, Daniel Henrique Barboza wrote: >> PPC_INTERRUPT_EBB is a new interrupt that will be used to deliver EBB >> exceptions that had to be postponed because the thread wasn't in problem >> state at the time the event-based branch was supposed to occur. >> >> ISA 3.1 also defines two EBB exceptions: Performance Monitor EBB >> exception and External EBB exception. They are being added as >> POWERPC_EXCP_PERFM_EBB and POWERPC_EXCP_EXTERNAL_EBB. >> >> PPC_INTERRUPT_EBB will check BESCR bits to see the EBB type that >> occurred and trigger the appropriate exception. Both exceptions are >> doing the same thing in this first implementation: clear BESCR_GE and >> enter the branch with env->nip retrieved from SPR_EBBHR. >> >> The checks being done by the interrupt code are msr_pr and BESCR_GE >> states. All other checks (EBB facility check, BESCR_PME bit, specific >> bits related to the event type) must be done beforehand. >> >> Signed-off-by: Daniel Henrique Barboza > > It looks correct. > > Reviewed-by: Cédric Le Goater > > Next step is to modify the POWER9 input pins and these routines : > >   xive_tctx_realize() >   xive_tctx_output() >   power9_set_irq() > > to add an EBB "wire" between the IC and the CPU. Got it. I'll see if I can get this EBB lane up from the IC and CPU. Any suggestions how I should test it? Thanks, Daniel > > Thanks, > > C. > > >> --- >>   target/ppc/cpu.h         |  5 ++++- >>   target/ppc/cpu_init.c    |  4 ++++ >>   target/ppc/excp_helper.c | 33 +++++++++++++++++++++++++++++++++ >>   3 files changed, 41 insertions(+), 1 deletion(-) >> >> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h >> index dcd83b503c..3962c8f6f4 100644 >> --- a/target/ppc/cpu.h >> +++ b/target/ppc/cpu.h >> @@ -129,8 +129,10 @@ enum { >>       /* ISA 3.00 additions */ >>       POWERPC_EXCP_HVIRT    = 101, >>       POWERPC_EXCP_SYSCALL_VECTORED = 102, /* scv exception                     */ >> +    POWERPC_EXCP_PERFM_EBB = 103,    /* Performance Monitor EBB Exception    */ >> +    POWERPC_EXCP_EXTERNAL_EBB = 104, /* External EBB Exception               */ >>       /* EOL                                                                   */ >> -    POWERPC_EXCP_NB       = 103, >> +    POWERPC_EXCP_NB       = 105, >>       /* QEMU exceptions: special cases we want to stop translation            */ >>       POWERPC_EXCP_SYSCALL_USER = 0x203, /* System call in user mode only      */ >>   }; >> @@ -2453,6 +2455,7 @@ enum { >>       PPC_INTERRUPT_HMI,            /* Hypervisor Maintenance interrupt    */ >>       PPC_INTERRUPT_HDOORBELL,      /* Hypervisor Doorbell interrupt        */ >>       PPC_INTERRUPT_HVIRT,          /* Hypervisor virtualization interrupt  */ >> +    PPC_INTERRUPT_EBB,            /* Event-based Branch exception         */ >>   }; >>   /* Processor Compatibility mask (PCR) */ >> diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c >> index bf60529d37..136d8ca8b5 100644 >> --- a/target/ppc/cpu_init.c >> +++ b/target/ppc/cpu_init.c >> @@ -2336,6 +2336,10 @@ static void init_excp_POWER8(CPUPPCState *env) >>       env->excp_vectors[POWERPC_EXCP_FU]       = 0x00000F60; >>       env->excp_vectors[POWERPC_EXCP_HV_FU]    = 0x00000F80; >>       env->excp_vectors[POWERPC_EXCP_SDOOR_HV] = 0x00000E80; >> + >> +    /* Userland exceptions without vector value in PowerISA v3.1 */ >> +    env->excp_vectors[POWERPC_EXCP_PERFM_EBB] = 0x0; >> +    env->excp_vectors[POWERPC_EXCP_EXTERNAL_EBB] = 0x0; >>   #endif >>   } >> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c >> index 8a49a4ab90..ad40a0f8e6 100644 >> --- a/target/ppc/excp_helper.c >> +++ b/target/ppc/excp_helper.c >> @@ -990,6 +990,21 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp) >>           new_msr |= (target_ulong)MSR_HVB; >>           new_msr |= env->msr & ((target_ulong)1 << MSR_RI); >>           break; >> +    case POWERPC_EXCP_PERFM_EBB:        /* Performance Monitor EBB Exception  */ >> +    case POWERPC_EXCP_EXTERNAL_EBB:     /* External EBB Exception             */ >> +        env->spr[SPR_BESCR] &= ~BESCR_GE; >> + >> +        /* >> +         * Save NIP for rfebb insn in SPR_EBBRR. Next nip is >> +         * stored in the EBB Handler SPR_EBBHR. >> +         */ >> +        env->spr[SPR_EBBRR] = env->nip; >> +        powerpc_set_excp_state(cpu, env->spr[SPR_EBBHR], env->msr); >> + >> +        /* >> +         * This exception is handled in userspace. No need to proceed. >> +         */ >> +        return; >>       case POWERPC_EXCP_THERM:     /* Thermal interrupt                        */ >>       case POWERPC_EXCP_PERFM:     /* Embedded performance monitor interrupt   */ >>       case POWERPC_EXCP_VPUA:      /* Vector assist exception                  */ >> @@ -1681,6 +1696,24 @@ static void ppc_hw_interrupt(CPUPPCState *env) >>               powerpc_excp(cpu, POWERPC_EXCP_THERM); >>               return; >>           } >> +        /* EBB exception */ >> +        if (env->pending_interrupts & (1 << PPC_INTERRUPT_EBB)) { >> +            /* >> +             * EBB exception must be taken in problem state and >> +             * with BESCR_GE set. >> +             */ >> +            if (msr_pr == 1 && env->spr[SPR_BESCR] & BESCR_GE) { >> +                env->pending_interrupts &= ~(1 << PPC_INTERRUPT_EBB); >> + >> +                if (env->spr[SPR_BESCR] & BESCR_PMEO) { >> +                    powerpc_excp(cpu, POWERPC_EXCP_PERFM_EBB); >> +                } else if (env->spr[SPR_BESCR] & BESCR_EEO) { >> +                    powerpc_excp(cpu, POWERPC_EXCP_EXTERNAL_EBB); >> +                } >> + >> +                return; >> +            } >> +        } >>       } >>       if (env->resume_as_sreset) { >> >