Re: [Qemu-devel] [PATCH v4] [i.MX] fix CS handling during SPI access.

["mar.krzeminski" <mar.krzeminski@gmail.com>]

W dniu 11.01.2017 o 17:12, Jean-Christophe DUBOIS pisze:
> Le 10/01/2017 à 00:02, Peter Maydell a écrit :
>> On 9 January 2017 at 22:27, Jean-Christophe DUBOIS 
>> <jcd@tribudubois.net> wrote:
>>> I might be wrong but I think they are coming out of reset with
>>> their CS line set to low (so they are selected by default)
>>> because this is the default level at reset.
>> If that's true then you're in difficulties, because
>> there's no guarantee about device reset order. So
>> even if your SPI controller calls qemu_set_irq in
>> its reset function, if the devices on the other
>> end happen to have their reset called after the
>> controller then they'll still reset into selected...
I think the simplest solution in this case is to go back what you had 
before:
set each CS line state at the beginning of each new transfer - then at 
first transfer
you will properly set all CS line before transfer begin. After transfer 
end just negate
active CS line.

> How does it work for platforms that would have pull-up resistors on 
> some signals? Is it something we cannot model in QEMU?
>
> On a related note, it seems quite a few SPI controller emulator are 
> actually calling qemu_set_irq() in their reset handler.
I also have the same problem.

Thanks,
Marcin
>
> JC
>
>>
>> thanks
>> -- PMM
>>
>
>