From: Ethan MILON <ethan.milon@eviden.com>
To: Alejandro Jimenez <alejandro.j.jimenez@oracle.com>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: "pbonzini@redhat.com" <pbonzini@redhat.com>,
"richard.henderson@linaro.org" <richard.henderson@linaro.org>,
"eduardo@habkost.net" <eduardo@habkost.net>,
"peterx@redhat.com" <peterx@redhat.com>,
"david@redhat.com" <david@redhat.com>,
"philmd@linaro.org" <philmd@linaro.org>,
"mst@redhat.com" <mst@redhat.com>,
"marcel.apfelbaum@gmail.com" <marcel.apfelbaum@gmail.com>,
"alex.williamson@redhat.com" <alex.williamson@redhat.com>,
"vasant.hegde@amd.com" <vasant.hegde@amd.com>,
"suravee.suthikulpanit@amd.com" <suravee.suthikulpanit@amd.com>,
"santosh.shukla@amd.com" <santosh.shukla@amd.com>,
"sarunkod@amd.com" <sarunkod@amd.com>,
"Wei.Huang2@amd.com" <Wei.Huang2@amd.com>,
CLEMENT MATHIEU--DRIF <clement.mathieu--drif@eviden.com>,
"joao.m.martins@oracle.com" <joao.m.martins@oracle.com>,
"boris.ostrovsky@oracle.com" <boris.ostrovsky@oracle.com>
Subject: Re: [PATCH v2 18/20] amd_iommu: Toggle address translation mode on devtab entry invalidation
Date: Thu, 12 Jun 2025 08:27:57 +0000 [thread overview]
Message-ID: <5fedf606-dd01-4a0a-af67-077e9ef9d0fd@eviden.com> (raw)
In-Reply-To: <20250502021605.1795985-19-alejandro.j.jimenez@oracle.com>
Hi,
On 5/2/25 4:16 AM, Alejandro Jimenez wrote:
> Caution: External email. Do not open attachments or click links, unless this email comes from a known sender and you know the content is safe.
>
>
> A guest must issue an INVALIDATE_DEVTAB_ENTRY command after changing a
> Device Table entry (DTE) e.g. after attaching a device and setting up its
> DTE. When intercepting this event, determine if the DTE has been configured
> for paging or not, and toggle the appropriate memory regions to allow DMA
> address translation for the address space if needed. Requires dma-remap=on.
>
> Signed-off-by: Alejandro Jimenez <alejandro.j.jimenez@oracle.com>
> ---
> hw/i386/amd_iommu.c | 78 +++++++++++++++++++++++++++++++++++++++++++--
> 1 file changed, 76 insertions(+), 2 deletions(-)
>
> diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
> index a2df73062bf7..75a92067f35f 100644
> --- a/hw/i386/amd_iommu.c
> +++ b/hw/i386/amd_iommu.c
> @@ -991,18 +991,92 @@ static void amdvi_switch_address_space_all(AMDVIState *s)
> }
> }
>
> +/*
> + * A guest driver must issue the INVALIDATE_DEVTAB_ENTRY command to the IOMMU
> + * after changing a Device Table entry. We can use this fact to detect when a
> + * Device Table entry is created for a device attached to a paging domain and
> + * enable the corresponding IOMMU memory region to allow for DMA translation if
> + * appropriate.
> + */
> +static void amdvi_update_addr_translation_mode(AMDVIState *s, uint16_t devid)
> +{
> + uint8_t bus_num, devfn, dte_mode;
> + AMDVIAddressSpace *as;
> + uint64_t dte[4] = { 0 };
> + IOMMUNotifier *n;
> + int ret;
> +
> + /*
> + * Convert the devid encoded in the command to a bus and devfn in
> + * order to retrieve the corresponding address space.
> + */
> + bus_num = PCI_BUS_NUM(devid);
> + devfn = devid & 0xff;
> +
> + /*
> + * The main buffer of size (AMDVIAddressSpace *) * (PCI_BUS_MAX) has already
> + * been allocated within AMDVIState, but must be careful to not access
> + * unallocated devfn.
> + */
> + if (!s->address_spaces[bus_num] || !s->address_spaces[bus_num][devfn]) {
> + return;
> + }
> + as = s->address_spaces[bus_num][devfn];
> +
> + ret = amdvi_as_to_dte(as, dte);
> +
> + if (!ret) {
> + dte_mode = (dte[0] >> AMDVI_DEV_MODE_RSHIFT) & AMDVI_DEV_MODE_MASK;
> + }
> +
> + if ((ret < 0) || (!ret && !dte_mode)) {
> + /*
> + * The DTE could not be retrieved, it is not valid, or it is not setup
> + * for paging. In either case, ensure that if paging was previously in
> + * use then invalidate all existing mappings and then switch to use the
> + * no_dma memory region.
> + */
If the DTE is malformed or could not be retrieved, wouldn't it be safer
to default to the DMA region rather than falling back to direct access?
Or am I missing something?
Thanks,
Ethan
> + if (as->addr_translation) {
> + as->addr_translation = false;
> +
> + IOMMU_NOTIFIER_FOREACH(n, &as->iommu) {
> + amdvi_address_space_unmap(as, n);
> + }
> + amdvi_switch_address_space(as);
> + }
> + } else if (!as->addr_translation) {
> + /*
> + * Installing a DTE that enables translation where it wasn't previously
> + * active. Activate the DMA memory region.
> + */
> + as->addr_translation = true;
> + amdvi_switch_address_space(as);
> + amdvi_address_space_sync(as);
> + }
> +}
> +
> /* log error without aborting since linux seems to be using reserved bits */
> static void amdvi_inval_devtab_entry(AMDVIState *s, uint64_t *cmd)
> {
> uint16_t devid = cpu_to_le16((uint16_t)extract64(cmd[0], 0, 16));
>
> + trace_amdvi_devtab_inval(PCI_BUS_NUM(devid), PCI_SLOT(devid),
> + PCI_FUNC(devid));
> +
> /* This command should invalidate internal caches of which there isn't */
> if (extract64(cmd[0], 16, 44) || cmd[1]) {
> amdvi_log_illegalcom_error(s, extract64(cmd[0], 60, 4),
> s->cmdbuf + s->cmdbuf_head);
> + return;
> + }
> +
> + /*
> + * When DMA remapping capability is enabled, check if updated DTE is setup
> + * for paging or not, and configure the corresponding memory regions.
> + */
> + if (s->dma_remap) {
> + amdvi_update_addr_translation_mode(s, devid);
> }
> - trace_amdvi_devtab_inval(PCI_BUS_NUM(devid), PCI_SLOT(devid),
> - PCI_FUNC(devid));
> }
>
> static void amdvi_complete_ppr(AMDVIState *s, uint64_t *cmd)
> --
> 2.43.5
>
next prev parent reply other threads:[~2025-06-12 8:29 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-02 2:15 [PATCH v2 00/20] AMD vIOMMU: DMA remapping support for VFIO devices Alejandro Jimenez
2025-05-02 2:15 ` [PATCH v2 01/20] memory: Adjust event ranges to fit within notifier boundaries Alejandro Jimenez
2025-05-11 18:31 ` Michael S. Tsirkin
2025-05-12 8:02 ` David Hildenbrand
2025-05-12 17:29 ` Peter Xu
2025-06-12 6:54 ` Vasant Hegde
2025-06-12 21:49 ` Alejandro Jimenez
2025-05-02 2:15 ` [PATCH v2 02/20] amd_iommu: Document '-device amd-iommu' common options Alejandro Jimenez
2025-05-02 2:15 ` [PATCH v2 03/20] amd_iommu: Reorder device and page table helpers Alejandro Jimenez
2025-05-02 2:15 ` [PATCH v2 04/20] amd_iommu: Helper to decode size of page invalidation command Alejandro Jimenez
2025-05-02 2:15 ` [PATCH v2 05/20] amd_iommu: Add helper function to extract the DTE Alejandro Jimenez
2025-05-12 6:45 ` Sairaj Kodilkar
2025-05-14 20:23 ` Alejandro Jimenez
2025-05-20 10:18 ` Ethan MILON
2025-05-21 14:49 ` Alejandro Jimenez
2025-06-12 8:31 ` Ethan MILON
2025-05-02 2:15 ` [PATCH v2 06/20] amd_iommu: Return an error when unable to read PTE from guest memory Alejandro Jimenez
2025-06-12 10:37 ` Vasant Hegde
2025-06-13 17:44 ` Alejandro Jimenez
2025-05-02 2:15 ` [PATCH v2 07/20] amd_iommu: Add helpers to walk AMD v1 Page Table format Alejandro Jimenez
2025-05-02 2:15 ` [PATCH v2 08/20] amd_iommu: Add a page walker to sync shadow page tables on invalidation Alejandro Jimenez
2025-05-02 2:15 ` [PATCH v2 09/20] amd_iommu: Add basic structure to support IOMMU notifier updates Alejandro Jimenez
2025-05-12 6:52 ` Sairaj Kodilkar
2025-06-23 10:53 ` Sairaj Kodilkar
2025-05-02 2:15 ` [PATCH v2 10/20] amd_iommu: Sync shadow page tables on page invalidation Alejandro Jimenez
2025-05-02 2:15 ` [PATCH v2 11/20] amd_iommu: Use iova_tree records to determine large page size on UNMAP Alejandro Jimenez
2025-06-11 8:29 ` Sairaj Kodilkar
2025-06-13 21:50 ` Alejandro Jimenez
2025-05-02 2:15 ` [PATCH v2 12/20] amd_iommu: Unmap all address spaces under the AMD IOMMU on reset Alejandro Jimenez
2025-05-02 2:15 ` [PATCH v2 13/20] amd_iommu: Add replay callback Alejandro Jimenez
2025-05-02 2:15 ` [PATCH v2 14/20] amd_iommu: Invalidate address translations on INVALIDATE_IOMMU_ALL Alejandro Jimenez
2025-05-02 2:16 ` [PATCH v2 15/20] amd_iommu: Toggle memory regions based on address translation mode Alejandro Jimenez
2025-05-12 6:52 ` Sairaj Kodilkar
2025-05-02 2:16 ` [PATCH v2 16/20] amd_iommu: Set all address spaces to default translation mode on reset Alejandro Jimenez
2025-05-29 6:16 ` Sairaj Kodilkar
2025-05-30 21:30 ` Alejandro Jimenez
2025-06-13 8:46 ` Sairaj Kodilkar
2025-06-23 22:08 ` Alejandro Jimenez
2025-05-02 2:16 ` [PATCH v2 17/20] amd_iommu: Add dma-remap property to AMD vIOMMU device Alejandro Jimenez
2025-05-02 2:16 ` [PATCH v2 18/20] amd_iommu: Toggle address translation mode on devtab entry invalidation Alejandro Jimenez
2025-06-12 8:27 ` Ethan MILON [this message]
2025-06-12 11:23 ` Sairaj Kodilkar
2025-05-02 2:16 ` [PATCH v2 19/20] amd_iommu: Do not assume passthrough translation when DTE[TV]=0 Alejandro Jimenez
2025-05-12 7:00 ` Sairaj Kodilkar
2025-05-14 21:49 ` Alejandro Jimenez
2025-05-16 8:14 ` Sairaj Kodilkar
2025-05-02 2:16 ` [PATCH v2 20/20] amd_iommu: Refactor amdvi_page_walk() to use common code for page walk Alejandro Jimenez
2025-05-11 18:34 ` [PATCH v2 00/20] AMD vIOMMU: DMA remapping support for VFIO devices Michael S. Tsirkin
2025-05-16 8:07 ` Sairaj Kodilkar
2025-05-21 2:35 ` Alejandro Jimenez
2025-05-21 6:21 ` Sairaj Kodilkar
2025-05-30 11:41 ` Michael S. Tsirkin
2025-05-30 14:39 ` Alejandro Jimenez
2025-06-02 4:49 ` Sairaj Kodilkar
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