From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>
Cc: Andrew Jeffery <andrew@aj.id.au>,
qemu-arm@nongnu.org, Joel Stanley <joel@jms.id.au>,
qemu-devel@nongnu.org
Subject: Re: [PATCH 3/5] ftgmac100: check RX and TX buffer alignment
Date: Fri, 10 Jan 2020 11:24:43 +0100 [thread overview]
Message-ID: <60b09f95-ad05-b420-3900-4afbc95a372c@redhat.com> (raw)
In-Reply-To: <ce0722d4-48ed-e7cd-2436-84d1ee24038f@kaod.org>
On 1/7/20 9:36 AM, Cédric Le Goater wrote:
> On 1/7/20 9:27 AM, Philippe Mathieu-Daudé wrote:
>> On 1/7/20 8:34 AM, Cédric Le Goater wrote:
>>> These buffers should be aligned on 16 bytes.
>>>
>>> Signed-off-by: Cédric Le Goater <clg@kaod.org>
>>> ---
>>> hw/net/ftgmac100.c | 13 +++++++++++++
>>> 1 file changed, 13 insertions(+)
>>>
>>> diff --git a/hw/net/ftgmac100.c b/hw/net/ftgmac100.c
>>> index 86ac25894a89..051f7b7af2d6 100644
>>> --- a/hw/net/ftgmac100.c
>>> +++ b/hw/net/ftgmac100.c
>>> @@ -198,6 +198,8 @@ typedef struct {
>>> uint32_t des3;
>>> } FTGMAC100Desc;
>>> +#define FTGMAC100_DESC_ALIGNMENT 16
>>> +
>>> /*
>>> * Specific RTL8211E MII Registers
>>> */
>>> @@ -722,6 +724,12 @@ static void ftgmac100_write(void *opaque, hwaddr addr,
>>> s->itc = value;
>>> break;
>>> case FTGMAC100_RXR_BADR: /* Ring buffer address */
>>> + if (!QEMU_IS_ALIGNED(value, FTGMAC100_DESC_ALIGNMENT)) {
>>> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad RX buffer alignment 0x%"
>>> + HWADDR_PRIx "\n", __func__, value);
>>> + return;
>>
>> What is the hardware behavior?
>
> This is not documented :/
What happens if we don't return?
>>
>>> + }
>>> +
>>> s->rx_ring = value;
>>> s->rx_descriptor = s->rx_ring;
>>> break;
>>> @@ -731,6 +739,11 @@ static void ftgmac100_write(void *opaque, hwaddr addr,
>>> break;
>>> case FTGMAC100_NPTXR_BADR: /* Transmit buffer address */
>>> + if (!QEMU_IS_ALIGNED(value, FTGMAC100_DESC_ALIGNMENT)) {
>>> + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad TX buffer alignment 0x%"
>>> + HWADDR_PRIx "\n", __func__, value);
>>> + return;
>>> + }
>>> s->tx_ring = value;
>>> s->tx_descriptor = s->tx_ring;
>>> break;
>>>
>>
>
next prev parent reply other threads:[~2020-01-10 10:25 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-07 7:34 [PATCH 0/5] aspeed: extensions and fixes Cédric Le Goater
2020-01-07 7:34 ` [PATCH 1/5] hw/sd: Configure number of slots exposed by the ASPEED SDHCI model Cédric Le Goater
2020-01-07 7:34 ` [PATCH 2/5] hw/arm: ast2600: Wire up the eMMC controller Cédric Le Goater
2020-01-07 8:25 ` Philippe Mathieu-Daudé
2020-01-10 10:07 ` Cédric Le Goater
2020-01-10 11:56 ` Cédric Le Goater
2020-01-12 23:20 ` Andrew Jeffery
2020-01-07 7:34 ` [PATCH 3/5] ftgmac100: check RX and TX buffer alignment Cédric Le Goater
2020-01-07 8:27 ` Philippe Mathieu-Daudé
2020-01-07 8:36 ` Cédric Le Goater
2020-01-10 10:24 ` Philippe Mathieu-Daudé [this message]
2020-01-07 7:34 ` [PATCH 4/5] hw/arm/aspeed: add a 'execute-in-place' property to boot directly from CE0 Cédric Le Goater
2020-01-07 8:34 ` Philippe Mathieu-Daudé
2020-01-10 10:14 ` Cédric Le Goater
2020-01-07 7:34 ` [PATCH 5/5] misc/pca9552: Add qom set and get Cédric Le Goater
2020-01-13 7:44 ` [PATCH 0/5] aspeed: extensions and fixes Cédric Le Goater
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