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([2806:102e:18:70b5:e6fc:c295:e710:da09]) by smtp.gmail.com with ESMTPSA id o31-20020a056871079f00b00143065d3e99sm11548272oap.5.2022.12.06.16.43.02 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 06 Dec 2022 16:43:02 -0800 (PST) Message-ID: <60d11ef4-40f5-6743-202a-549f83899efb@linaro.org> Date: Tue, 6 Dec 2022 18:42:59 -0600 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: [PATCH v3 02/13] tcg/s390x: Remove TCG_REG_TB Content-Language: en-US From: Richard Henderson To: Ilya Leoshkevich , qemu-devel@nongnu.org Cc: thuth@redhat.com References: <20221202065200.224537-1-richard.henderson@linaro.org> <20221202065200.224537-3-richard.henderson@linaro.org> <20221206192947.fi6c3ftrueuiqmch@heavy> <8a3965f7-f830-6343-be15-4e16b20655fd@linaro.org> In-Reply-To: <8a3965f7-f830-6343-be15-4e16b20655fd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2001:4860:4864:20::36; envelope-from=richard.henderson@linaro.org; helo=mail-oa1-x36.google.com X-Spam_score_int: -23 X-Spam_score: -2.4 X-Spam_bar: -- X-Spam_report: (-2.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.27, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 12/6/22 16:22, Richard Henderson wrote: >> Wouldn't it be worth keeping XILF/XIFH here? > > I don't know.  It's difficult for me to guess whether a dependency chain like > >     val -> xor -> xor > > (3 insns with serial dependencies) is better than > >     val   --> xor >     load  -/ > > (3 insns, but only one serial dependency) is better.  But there may also be instruction > fusion going on at the micro-architectural level, so that there's really only one xor. > > If you have suggestions, I'm all ears. Related microarchitectural question: If a 32-bit insn and a 64-bit insn have a similar size encoding (and perhaps even if they don't), is it better to produce a 64-bit output so that the hw doesn't have a false dependency on the upper 32-bits of the register? Just wondering whether most of the distinction between 32-bit and 64-bit opcodes ought to be discarded, simplifying code generation. The only items that seem most likely to have real execution time differences are multiply and divide. r~