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From: Richard Henderson <richard.henderson@linaro.org>
To: Stafford Horne <shorne@gmail.com>,
	QEMU Development <qemu-devel@nongnu.org>
Cc: Openrisc <openrisc@lists.librecores.org>
Subject: Re: [PATCH v2 06/11] hw/openrisc: Initialize timer time at startup
Date: Mon, 4 Jul 2022 15:33:26 +0530	[thread overview]
Message-ID: <60e84190-a60f-0ed0-8755-61d5087fdf9a@linaro.org> (raw)
In-Reply-To: <20220703212823.10067-7-shorne@gmail.com>

On 7/4/22 02:58, Stafford Horne wrote:
> The last_clk time was initialized at zero, this means when we calculate
> the first delta we will calculate 0 vs current time which could cause
> unnecessary hops.
> 
> Initialize last_clk to the qemu clock on initialization.
> 
> Signed-off-by: Stafford Horne <shorne@gmail.com>
> ---
>   hw/openrisc/cputimer.c | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/hw/openrisc/cputimer.c b/hw/openrisc/cputimer.c
> index 93268815d8..4dbba3a3d4 100644
> --- a/hw/openrisc/cputimer.c
> +++ b/hw/openrisc/cputimer.c
> @@ -140,6 +140,7 @@ void cpu_openrisc_clock_init(OpenRISCCPU *cpu)
>   
>       if (or1k_timer == NULL) {
>           or1k_timer = g_new0(OR1KTimerState, 1);
> +        or1k_timer->last_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
>           vmstate_register(NULL, 0, &vmstate_or1k_timer, or1k_timer);
>       }
>   }

Init doesn't seem right.  Should be in reset?


r~


  reply	other threads:[~2022-07-04 10:05 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-03 21:28 [PATCH v2 00/11] OpenRISC Virtual Machine Stafford Horne
2022-07-03 21:28 ` [PATCH v2 01/11] hw/openrisc: Split re-usable boot time apis out to boot.c Stafford Horne
2022-07-03 21:28 ` [PATCH v2 02/11] target/openrisc: Fix memory reading in debugger Stafford Horne
2022-07-04 10:01   ` Richard Henderson
2022-07-03 21:28 ` [PATCH v2 03/11] goldfish_rtc: Add endianness property Stafford Horne
2022-07-04  2:50   ` Anup Patel
2022-07-04  9:59   ` Richard Henderson
2022-07-04 10:16     ` Laurent Vivier
2022-07-04 10:21       ` Richard Henderson
2022-07-04 10:23         ` Laurent Vivier
2022-07-04 20:40           ` Stafford Horne
2022-07-05  0:53             ` Jason A. Donenfeld
2022-07-04 20:32     ` Stafford Horne
2022-07-03 21:28 ` [PATCH v2 04/11] hw/openrisc: Add the OpenRISC virtual machine Stafford Horne
2022-07-03 21:28 ` [PATCH v2 05/11] hw/openrisc: Add PCI bus support to virt Stafford Horne
2022-07-03 21:28 ` [PATCH v2 06/11] hw/openrisc: Initialize timer time at startup Stafford Horne
2022-07-04 10:03   ` Richard Henderson [this message]
2022-07-04 20:32     ` [PATCH v2 06/11] hw/openrisc: Initialize timer time at startupi Stafford Horne
2022-07-03 21:28 ` [PATCH v2 07/11] target/openrisc: Add interrupted CPU to log Stafford Horne
2022-07-04 10:04   ` Richard Henderson
2022-07-04 20:26     ` Stafford Horne
2022-07-03 21:28 ` [PATCH v2 08/11] target/openrisc: Enable MTTCG Stafford Horne
2022-07-04 10:07   ` Richard Henderson
2022-07-04 20:31     ` Stafford Horne
2022-07-03 21:28 ` [PATCH v2 09/11] target/openrisc: Interrupt handling fixes Stafford Horne
2022-07-04 10:20   ` Richard Henderson
2022-07-03 21:28 ` [PATCH v2 10/11] hw/openrisc: virt: pass random seed to fdt Stafford Horne
2022-07-04 10:22   ` Richard Henderson
2022-07-03 21:28 ` [PATCH v2 11/11] docs/system: openrisc: Add OpenRISC documentation Stafford Horne
2022-07-04 10:25   ` Richard Henderson

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