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[93.51.222.138]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-45b6f30fe02sm365769355e9.18.2025.09.04.09.44.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 04 Sep 2025 09:44:08 -0700 (PDT) Message-ID: <611cba04-c567-439e-8f52-4d5f74828083@linaro.org> Date: Thu, 4 Sep 2025 18:44:06 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] target/sparc: allow partial decode of v8 STBAR instructions To: Mark Cave-Ayland , qemu-devel@nongnu.org References: <20250904161026.804239-1-mark.cave-ayland@ilande.co.uk> From: Richard Henderson Content-Language: en-US In-Reply-To: <20250904161026.804239-1-mark.cave-ayland@ilande.co.uk> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 9/4/25 18:10, Mark Cave-Ayland wrote: > Solaris 8 appears to have a bug whereby it executes v9 MEMBAR instructions > when booting a freshly installed image. According to the SPARC v8 > architecture manual, whilst bits 14 and bits 13-0 of the "Read State Register > Instructions" are notionally zero, they are marked as unused (i.e. ignored). > In effect the v9 MEMBAR instruction becomes a v8 STBAR instruction on a 32-bit > SPARC CPU. > > Adjust the avail_32() logic in trans_MEMBAR() so that if a v9 MEMBAR > instruction is executed on 32-bit SPARC, the equivalent of a v8 STBAR > instruction is executed instead. > > Signed-off-by: Mark Cave-Ayland > Fixes: af25071c1d ("target/sparc: Move RDASR, STBAR, MEMBAR to decodetree") > Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3097 > --- > target/sparc/translate.c | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/target/sparc/translate.c b/target/sparc/translate.c > index b922e53bf1..9efefe41c6 100644 > --- a/target/sparc/translate.c > +++ b/target/sparc/translate.c > @@ -2832,7 +2832,15 @@ static bool trans_STBAR(DisasContext *dc, arg_STBAR *a) > static bool trans_MEMBAR(DisasContext *dc, arg_MEMBAR *a) > { > if (avail_32(dc)) { > - return false; > + /* > + * At least Solaris 8 executes v9 MEMBAR instructions such as > + * 0x8143e008 during boot. According to the SPARC v8 architecture > + * manual, bits 13 and 12-0 are unused (notionally zero) so in > + * this case if we assume the unused bits are not decoded then > + * the instruction becomes 0x8143c000, or the equivalent of STBAR. > + */ > + tcg_gen_mb(TCG_MO_ST_ST | TCG_BAR_SC); > + return advance_pc(dc); > } You could avoid replicating this and do return trans_STBAR(dc, NULL); Anyway, Reviewed-by: Richard Henderson r~