From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH 08/10] target/arm: Fix has_vfp/has_neon ID reg squashing for M-profile
Date: Tue, 13 Oct 2020 12:07:44 -0700 [thread overview]
Message-ID: <614adbe6-c16c-f18d-c444-a474e6b6f559@linaro.org> (raw)
In-Reply-To: <20201012153746.9996-9-peter.maydell@linaro.org>
On 10/12/20 8:37 AM, Peter Maydell wrote:
> In arm_cpu_realizefn(), if the CPU has VFP or Neon disabled then we
> squash the ID register fields so that we don't advertise it to the
> guest. This code was written for A-profile and needs some tweaks to
> work correctly on M-profile:
>
> * A-profile only fields should not be zeroed on M-profile:
> - MVFR0.FPSHVEC,FPTRAP
> - MVFR1.SIMDLS,SIMDINT,SIMDSP,SIMDHP
> - MVFR2.SIMDMISC
> * M-profile only fields should be zeroed on M-profile:
> - MVFR1.FP16
>
> In particular, because MVFR1.SIMDHP on A-profile is the same field as
> MVFR1.FP16 on M-profile this code was incorrectly disabling FP16
> support on an M-profile CPU (where has_neon is always false). This
> isn't a visible bug yet because we don't have any M-profile CPUs with
> FP16 support, but the change is necessary before we introduce any.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> target/arm/cpu.c | 29 ++++++++++++++++++-----------
> 1 file changed, 18 insertions(+), 11 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2020-10-13 19:09 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-12 15:37 [PATCH 00/10] target/arm: Various v8.1M minor features Peter Maydell
2020-10-12 15:37 ` [PATCH 01/10] decodetree: Fix codegen for non-overlapping group inside overlapping group Peter Maydell
2020-10-13 16:02 ` Richard Henderson
2020-10-12 15:37 ` [PATCH 02/10] target/arm: Implement v8.1M NOCP handling Peter Maydell
2020-10-12 15:37 ` [PATCH 03/10] target/arm: Implement v8.1M conditional-select insns Peter Maydell
2020-10-13 16:37 ` Richard Henderson
2020-10-12 15:37 ` [PATCH 04/10] target/arm: Make the t32 insn[25:23]=111 group non-overlapping Peter Maydell
2020-10-13 16:40 ` Richard Henderson
2020-10-12 15:37 ` [PATCH 05/10] target/arm: Don't allow BLX imm for M-profile Peter Maydell
2020-10-13 16:41 ` Richard Henderson
2020-10-12 15:37 ` [PATCH 06/10] target/arm: Implement v8.1M branch-future insns (as NOPs) Peter Maydell
2020-10-13 16:58 ` Richard Henderson
2020-10-12 15:37 ` [PATCH 07/10] target/arm: Implement v8.1M low-overhead-loop instructions Peter Maydell
2020-10-12 19:56 ` Peter Maydell
2020-10-13 17:10 ` Richard Henderson
2020-10-13 17:12 ` Peter Maydell
2020-10-13 17:30 ` Richard Henderson
2020-10-13 20:24 ` Peter Maydell
2020-10-13 22:31 ` Richard Henderson
2020-10-12 15:37 ` [PATCH 08/10] target/arm: Fix has_vfp/has_neon ID reg squashing for M-profile Peter Maydell
2020-10-13 19:07 ` Richard Henderson [this message]
2020-10-12 15:37 ` [PATCH 09/10] target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension Peter Maydell
2020-10-13 20:06 ` Richard Henderson
2020-10-13 20:38 ` Peter Maydell
2020-10-13 21:01 ` Richard Henderson
2020-10-12 15:37 ` [PATCH 10/10] target/arm: Fix writing to FPSCR.FZ16 on M-profile Peter Maydell
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