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[156.19.246.23]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-aeda7e84cbdsm1478774a12.24.2025.02.25.11.20.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 25 Feb 2025 11:20:41 -0800 (PST) Message-ID: <61cbdd92-e5c1-443b-87f7-dba148b95b15@linaro.org> Date: Tue, 25 Feb 2025 11:20:39 -0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 004/162] tcg: Convert add to TCGOutOpBinary To: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org References: <20250216231012.2808572-1-richard.henderson@linaro.org> <20250216231012.2808572-5-richard.henderson@linaro.org> <21f85e1d-938e-40e8-b33d-95f8cb4a13a7@linaro.org> Content-Language: en-US From: Richard Henderson In-Reply-To: <21f85e1d-938e-40e8-b33d-95f8cb4a13a7@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 2/25/25 10:17, Philippe Mathieu-Daudé wrote: >> diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc >> index a0f050ff9c..08106b6e4c 100644 >> --- a/tcg/loongarch64/tcg-target.c.inc >> +++ b/tcg/loongarch64/tcg-target.c.inc > > >> +static const TCGOutOpBinary outop_add = { >> +    .base.static_constraint = C_O1_I2(r, r, rJ), > > So now 32-bit uses 'T' constraint (TCG_CT_CONST_S32) and we get the > signed32 cast, OK. Yes, TCG_CT_CONST_S32 will match all constants for TCG_TYPE_I32, so there is no change in functionality. >> +static const TCGOutOpBinary outop_add = { >> +    .base.static_constraint = C_O1_I2(r, r, rT), > > Similarly, 32-bit uses 'T' constraint (TCG_CT_CONST_S32) and we get the > signed32 cast, OK. Yes. >> @@ -2989,8 +3000,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type, >>                   tcg_out32(s, SUBFIC | TAI(a0, a2, a1)); >>               } >>           } else if (const_args[2]) { >> -            a2 = -a2; >> -            goto do_addi_32; >> +            tgen_addi(s, type, a0, a1, (int32_t)-a2); > > So do we really need the (int32_t) cast here? Interesting question. (0) Truncate -INT32_MIN to remain a 32-bit quantity. (1) We are *supposed* to have eliminated this case already, converting all subtract of constant to add of negative constant. That said, patch 9 fixes one more case of this. (There were rebase conflicts moving patch 9 earlier, so I took the lazy way and left it where it is.) (2) The cast goes away when we convert INDEX_op_sub_* and forcefully disallow subtract of constant. Because of (1), we *probably* don't need the cast now, but until (2) it's difficult to prove. On balance I think it's better to have it until we are sure we don't need it. >> +static const TCGOutOpBinary outop_add = { >> +    .base.static_constraint = C_O1_I2(r, r, rJ), > > Don't we need > >        .base.static_constraint = C_O1_I2(r, rz, rJ), > > since commit 1bbcae5adaa ("tcg/sparc64: Use 'z' constraint")? Constants should never appear in the first source operand. The optimize pass will always swap commutative operands. This patch asserts that this has been done: > + case INDEX_op_add_i32: > + case INDEX_op_add_i64: > + { > + const TCGOutOpBinary *out = > + container_of(all_outop[op->opc], TCGOutOpBinary, base); > + > + tcg_debug_assert(!const_args[1]); Therefore, simplify the constraints so that they're not attempting to handle nonsense. r~