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From: Paolo Bonzini <pbonzini@redhat.com>
To: "P J P" <ppandit@redhat.com>, "Hervé Poussineau" <hpoussin@reactos.org>
Cc: "Gonglei (Arei)" <arei.gonglei@huawei.com>,
	Qemu Developers <qemu-devel@nongnu.org>,
	Huawei PSIRT <PSIRT@huawei.com>,
	Aurelien Jarno <aurelien@aurel32.net>,
	"Michael S. Tsirkin" <mst@redhat.com>
Subject: Re: [Qemu-devel] [PATCH] dma: rc4030: limit interval timer reload value
Date: Thu, 17 Nov 2016 12:48:29 +0100	[thread overview]
Message-ID: <61e448f4-bfb0-e471-954d-0b2915f7950f@redhat.com> (raw)
In-Reply-To: <alpine.LFD.2.20.1611161156080.28676@wniryva>



On 16/11/2016 07:29, P J P wrote:
> +-- On Wed, 16 Nov 2016, Hervé Poussineau wrote --+
> | I don't have any datasheet for this device either, so I tested with real 
> | programs. Those initialize itr field to either 0 or to 9, so your mask 
> | doesn't change anything.
> | 
> | Tested-by: Hervé Poussineau <hpoussin@reactos.org>
> 
>   Thank you so much. To confirm, do we need to update the mask to maybe 
> 0x000F?

It's not needed if you change it as suggested elsewhere in the thread.

    timer_mod(s->periodic_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
              NANOSECONDS_PER_SECOND / 1000 * (s->itr + 1));

Thanks,

Paolo

> | > > >      case 0x0228:
> | > > > -        s->itr = val;
> | > > > +        s->itr = val & 0x01FF;
> | > > >          qemu_irq_lower(s->timer_irq);

  parent reply	other threads:[~2016-11-17 11:48 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-12 12:37 [Qemu-devel] [PATCH] dma: rc4030: limit interval timer reload value P J P
2016-11-10  5:56 ` Gonglei (Arei)
2016-11-10 14:50   ` Paolo Bonzini
2016-11-16  5:50     ` Hervé Poussineau
2016-11-16  6:03       ` Gonglei (Arei)
2016-11-16  6:29       ` P J P
2016-11-16  6:37         ` Hervé Poussineau
2016-11-17 11:48         ` Paolo Bonzini [this message]
2017-03-14 19:17       ` Cole Robinson
2017-03-14 19:35         ` Peter Maydell

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