From: Jinjie Ruan via <qemu-devel@nongnu.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: <eduardo@habkost.net>, <marcel.apfelbaum@gmail.com>,
<philmd@linaro.org>, <wangyanan55@huawei.com>,
<richard.henderson@linaro.org>, <qemu-devel@nongnu.org>,
<qemu-arm@nongnu.org>
Subject: Re: [RFC PATCH v8 05/23] target/arm: Support MSR access to ALLINT
Date: Wed, 20 Mar 2024 11:21:21 +0800 [thread overview]
Message-ID: <62b8b76c-8aa0-762c-e1c5-7ca20822249f@huawei.com> (raw)
In-Reply-To: <CAFEAcA9LnJJDsC8WZzd2ZYGgwqYkbH-FmxKHy0CXKcS2tEonJA@mail.gmail.com>
On 2024/3/20 1:30, Peter Maydell wrote:
> On Mon, 18 Mar 2024 at 09:37, Jinjie Ruan <ruanjinjie@huawei.com> wrote:
>>
>> Support ALLINT msr access as follow:
>> mrs <xt>, ALLINT // read allint
>> msr ALLINT, <xt> // write allint with imm
>>
>> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>> v5:
>> - Add Reviewed-by.
>> v4:
>> - Remove arm_is_el2_enabled() check in allint_check().
>> - Change to env->pstate instead of env->allint.
>> v3:
>> - Remove EL0 check in aa64_allint_access() which alreay checks in .access
>> PL1_RW.
>> - Use arm_hcrx_el2_eff() in aa64_allint_access() instead of env->cp15.hcrx_el2.
>> - Make ALLINT msr access function controlled by aa64_nmi.
>> ---
>> target/arm/helper.c | 34 ++++++++++++++++++++++++++++++++++
>> 1 file changed, 34 insertions(+)
>>
>> diff --git a/target/arm/helper.c b/target/arm/helper.c
>> index b19a0178ce..aa0151c775 100644
>> --- a/target/arm/helper.c
>> +++ b/target/arm/helper.c
>> @@ -4752,6 +4752,36 @@ static void aa64_daif_write(CPUARMState *env, const ARMCPRegInfo *ri,
>> env->daif = value & PSTATE_DAIF;
>> }
>>
>> +static void aa64_allint_write(CPUARMState *env, const ARMCPRegInfo *ri,
>> + uint64_t value)
>> +{
>> + env->pstate = (env->pstate & ~PSTATE_ALLINT) | (value & PSTATE_ALLINT);
>> +}
>> +
>> +static uint64_t aa64_allint_read(CPUARMState *env, const ARMCPRegInfo *ri)
>> +{
>> + return env->pstate & PSTATE_ALLINT;
>> +}
>> +
>> +static CPAccessResult aa64_allint_access(CPUARMState *env,
>> + const ARMCPRegInfo *ri, bool isread)
>> +{
>> + if (arm_current_el(env) == 1 && (arm_hcrx_el2_eff(env) & HCRX_TALLINT)) {
>> + return CP_ACCESS_TRAP_EL2;
>> + }
>> + return CP_ACCESS_OK;
>
> Forgot to note in my earlier email: HCRX_EL2.TALLINT traps
> only writes to ALLINT, not reads, so the condition
> here needs to also look at 'isread'.
Thank you! I'll fix it.
>
>> +}
>
> thanks
> -- PMM
next prev parent reply other threads:[~2024-03-20 3:21 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-18 9:35 [RFC PATCH v8 00/23] target/arm: Implement FEAT_NMI and FEAT_GICv3_NMI Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 01/23] target/arm: Handle HCR_EL2 accesses for bits introduced with FEAT_NMI Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 02/23] target/arm: Add PSTATE.ALLINT Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 03/23] target/arm: Add support for FEAT_NMI, Non-maskable Interrupt Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 04/23] target/arm: Implement ALLINT MSR (immediate) Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 05/23] target/arm: Support MSR access to ALLINT Jinjie Ruan via
2024-03-19 16:45 ` Peter Maydell
2024-03-20 3:13 ` Jinjie Ruan via
2024-03-19 17:30 ` Peter Maydell
2024-03-20 3:21 ` Jinjie Ruan via [this message]
2024-03-18 9:35 ` [RFC PATCH v8 06/23] target/arm: Add support for Non-maskable Interrupt Jinjie Ruan via
2024-03-19 17:28 ` Peter Maydell
2024-03-19 18:51 ` Richard Henderson
2024-03-19 19:26 ` Peter Maydell
2024-03-20 9:49 ` Jinjie Ruan via
2024-03-21 9:26 ` Jinjie Ruan via
2024-03-21 9:59 ` Peter Maydell
2024-03-21 11:41 ` Peter Maydell
2024-03-18 9:35 ` [RFC PATCH v8 07/23] target/arm: Add support for NMI in arm_phys_excp_target_el() Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 08/23] target/arm: Handle IS/FS in ISR_EL1 for NMI Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 09/23] target/arm: Handle PSTATE.ALLINT on taking an exception Jinjie Ruan via
2024-03-19 16:47 ` Peter Maydell
2024-03-28 8:56 ` Jinjie Ruan via
2024-03-28 10:46 ` Peter Maydell
2024-03-18 9:35 ` [RFC PATCH v8 10/23] hw/arm/virt: Wire NMI and VNMI irq lines from GIC to CPU Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 11/23] hw/intc/arm_gicv3: Add external IRQ lines for NMI Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 12/23] target/arm: Handle NMI in arm_cpu_do_interrupt_aarch64() Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 13/23] hw/intc/arm_gicv3: Add irq superpriority information Jinjie Ruan via
2024-03-21 13:17 ` Peter Maydell
2024-03-22 2:54 ` Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 14/23] hw/intc/arm_gicv3_redist: Implement GICR_INMIR0 Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 15/23] hw/intc/arm_gicv3: Implement GICD_INMIR Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 16/23] hw/intc: Enable FEAT_GICv3_NMI Feature Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 17/23] hw/intc/arm_gicv3: Add NMI handling CPU interface registers Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 18/23] hw/intc/arm_gicv3: Handle icv_nmiar1_read() for icc_nmiar1_read() Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 19/23] hw/intc/arm_gicv3: Implement NMI interrupt prioirty Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 20/23] hw/intc/arm_gicv3: Report the NMI interrupt in gicv3_cpuif_update() Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 21/23] hw/intc/arm_gicv3: Report the VNMI interrupt Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 22/23] target/arm: Add FEAT_NMI to max Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 23/23] hw/arm/virt: Add FEAT_GICv3_NMI feature support in virt GIC Jinjie Ruan via
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