From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Olaf Hering <olaf@aepfle.de>,
Bernhard Beschow <shentey@gmail.com>,
qemu-block@nongnu.org, qemu-devel@nongnu.org
Cc: John Snow <jsnow@redhat.com>
Subject: Re: [PATCH v3] hw/ide/piix: properly initialize the BMIBA register
Date: Wed, 12 Jul 2023 12:53:00 +0200 [thread overview]
Message-ID: <62d2e306-c5a7-a639-22a9-3ed664b2fa0a@linaro.org> (raw)
In-Reply-To: <20230712074721.14728-1-olaf@aepfle.de>
On 12/7/23 09:47, Olaf Hering wrote:
> According to the 82371FB documentation (82371FB.pdf, 2.3.9. BMIBA-BUS
> MASTER INTERFACE BASE ADDRESS REGISTER, April 1997), the register is
> 32bit wide. To properly reset it to default values, all 32bit need to be
> cleared. Bit #0 "Resource Type Indicator (RTE)" needs to be enabled.
>
> The initial change wrote just the lower 8 bit, leaving parts of the "Bus
> Master Interface Base Address" address at bit 15:4 unchanged.
>
> Fixes: e6a71ae327 ("Add support for 82371FB (Step A1) and Improved support for 82371SB (Function 1)")
>
> Signed-off-by: Olaf Hering <olaf@aepfle.de>
> Reviewed-by: Bernhard Beschow <shentey@gmail.com>
> ---
> hw/ide/piix.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
I can take this patch via mips-fixes.
next prev parent reply other threads:[~2023-07-12 10:53 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-12 7:47 [PATCH v3] hw/ide/piix: properly initialize the BMIBA register Olaf Hering
2023-07-12 10:53 ` Philippe Mathieu-Daudé [this message]
2023-07-12 12:08 ` Paolo Bonzini
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