Re: [PATCH 2/3] target/mips: fix SWM32 handling for micromips

["Philippe Mathieu-Daudé" <philmd@linaro.org>]

On 15/2/23 09:47, Marcin Nowakowski wrote:
> SWM32 should store a sequence of 32-bit words from the GPRs, but it was
> incorrectly coded to store 16-bit words only. As a result, an LWM32 that
> usually follows would restore invalid register values.
> 

Fixes: 7dd547e5ab ("target/mips: Use cpu_*_mmuidx_ra instead of 
MMU_MODE*_SUFFIX")

(I suppose a typo S[W] -> ST[W], since LW correctly converted to LDL)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>

> Signed-off-by: Marcin Nowakowski <marcin.nowakowski@fungible.com>
> ---
>   target/mips/tcg/ldst_helper.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/target/mips/tcg/ldst_helper.c b/target/mips/tcg/ldst_helper.c
> index d0bd0267b2..c1a8380e34 100644
> --- a/target/mips/tcg/ldst_helper.c
> +++ b/target/mips/tcg/ldst_helper.c
> @@ -248,14 +248,14 @@ void helper_swm(CPUMIPSState *env, target_ulong addr, target_ulong reglist,
>           target_ulong i;
>   
>           for (i = 0; i < base_reglist; i++) {
> -            cpu_stw_mmuidx_ra(env, addr, env->active_tc.gpr[multiple_regs[i]],
> +            cpu_stl_mmuidx_ra(env, addr, env->active_tc.gpr[multiple_regs[i]],
>                                 mem_idx, GETPC());
>               addr += 4;
>           }
>       }
>   
>       if (do_r31) {
> -        cpu_stw_mmuidx_ra(env, addr, env->active_tc.gpr[31], mem_idx, GETPC());
> +        cpu_stl_mmuidx_ra(env, addr, env->active_tc.gpr[31], mem_idx, GETPC());
>       }
>   }
>