From: Paolo Bonzini <pbonzini@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org, richard.henderson@linaro.org,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: Re: [PATCH] tcg/s390x: fix constraint for 32-bit TSTEQ/TSTNE
Date: Thu, 17 Oct 2024 12:28:17 +0200 [thread overview]
Message-ID: <63828708-4c76-4549-bf83-647d3a743f20@redhat.com> (raw)
In-Reply-To: <CAFEAcA_1mryG9RyeAqfeRQOvqysO=vV3m=012kLmTsT6p-CdZA@mail.gmail.com>
On 10/17/24 12:00, Peter Maydell wrote:
> On Thu, 17 Oct 2024 at 10:14, Paolo Bonzini <pbonzini@redhat.com> wrote:
>>
>> 32-bit TSTEQ and TSTNE is subject to the same constraints as
>> for 64-bit, but setcond_i32 and negsetcond_i32 were incorrectly
>> using TCG_CT_CONST ("i") instead of TCG_CT_CONST_CMP ("C").
>>
>> Adjust the constraint and make tcg_target_const_match use the
>> same sequence as tgen_cmp2: first check if the constant is a
>> valid operand for TSTEQ/TSTNE, then accept everything for 32-bit
>> non-test comparisons, finally check if the constant is a valid
>> operand for 64-bit non-test comparisons.
>>
>> Reported-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
>
> Should this cc stable? Does it cause any current problems?
> (AIUI the x86 target changes in your pending pullreq do
> trigger this.)
Yeah, that's a good idea. It's probably possible to construct x86 code
that triggers it (I'm surprised it wasn't found until now).
Paolo
next prev parent reply other threads:[~2024-10-17 10:29 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-17 9:14 [PATCH] tcg/s390x: fix constraint for 32-bit TSTEQ/TSTNE Paolo Bonzini
2024-10-17 10:00 ` Peter Maydell
2024-10-17 10:28 ` Paolo Bonzini [this message]
2024-10-17 16:20 ` Richard Henderson
2024-10-17 22:30 ` Philippe Mathieu-Daudé
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