From: "Naveen N Rao (AMD)" <naveen@kernel.org>
To: Paolo Bonzini <pbonzini@redhat.com>,
Eric Blake <eblake@redhat.com>,
Markus Armbruster <armbru@redhat.com>,
Marcelo Tosatti <mtosatti@redhat.com>
Cc: qemu-devel <qemu-devel@nongnu.org>, <kvm@vger.kernel.org>,
Tom Lendacky <thomas.lendacky@amd.com>,
Nikunj A Dadhania <nikunj@amd.com>,
"Daniel P. Berrange" <berrange@redhat.com>,
Eduardo Habkost <eduardo@habkost.net>,
Zhao Liu <zhao1.liu@intel.com>,
Michael Roth <michael.roth@amd.com>,
Roy Hopkins <roy.hopkins@randomman.co.uk>
Subject: [PATCH v2 8/9] target/i386: SEV: Add support for setting TSC frequency for Secure TSC
Date: Thu, 25 Sep 2025 15:47:37 +0530 [thread overview]
Message-ID: <65400881e426aa0e412eb431099626dceb145ddd.1758794556.git.naveen@kernel.org> (raw)
In-Reply-To: <cover.1758794556.git.naveen@kernel.org>
Add support for configuring the TSC frequency when Secure TSC is enabled
in SEV-SNP guests through a new "tsc-frequency" property on SEV-SNP
guest objects, similar to the vCPU-specific property used by regular
guests and TDX. A new property is needed since SEV-SNP guests require
the TSC frequency to be specified during early SNP_LAUNCH_START command
before any vCPUs are created.
The user-provided TSC frequency is set through KVM_SET_TSC_KHZ before
issuing KVM_SEV_SNP_LAUNCH_START.
Sample command-line:
-machine q35,confidential-guest-support=sev0 \
-object sev-snp-guest,id=sev0,cbitpos=51,reduced-phys-bits=1,secure-tsc=on,tsc-frequency=2500000000
Co-developed-by: Ketan Chaturvedi <Ketan.Chaturvedi@amd.com>
Signed-off-by: Ketan Chaturvedi <Ketan.Chaturvedi@amd.com>
Co-developed-by: Nikunj A Dadhania <nikunj@amd.com>
Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
Signed-off-by: Naveen N Rao (AMD) <naveen@kernel.org>
---
target/i386/sev.c | 46 ++++++++++++++++++++++++++++++++++++++++++++++
qapi/qom.json | 6 +++++-
2 files changed, 51 insertions(+), 1 deletion(-)
diff --git a/target/i386/sev.c b/target/i386/sev.c
index 68d193402de3..8bb9faaa7779 100644
--- a/target/i386/sev.c
+++ b/target/i386/sev.c
@@ -178,6 +178,7 @@ struct SevSnpGuestState {
char *id_auth_base64;
uint8_t *id_auth;
char *host_data;
+ uint32_t tsc_khz;
struct kvm_sev_snp_launch_start kvm_start_conf;
struct kvm_sev_snp_launch_finish kvm_finish_conf;
@@ -536,6 +537,13 @@ static int check_sev_features(SevCommonState *sev_common, uint64_t sev_features,
__func__, sev_features, sev_common->supported_sev_features);
return -1;
}
+ if (sev_snp_enabled() && SEV_SNP_GUEST(sev_common)->tsc_khz &&
+ !(sev_features & SVM_SEV_FEAT_SECURE_TSC)) {
+ error_setg(errp,
+ "%s: TSC frequency can only be set if Secure TSC is enabled",
+ __func__);
+ return -1;
+ }
return 0;
}
@@ -1085,6 +1093,19 @@ sev_snp_launch_start(SevCommonState *sev_common)
return 1;
}
+ if (is_sev_feature_set(sev_common, SVM_SEV_FEAT_SECURE_TSC) &&
+ sev_snp_guest->tsc_khz) {
+ rc = -EINVAL;
+ if (kvm_check_extension(kvm_state, KVM_CAP_VM_TSC_CONTROL)) {
+ rc = kvm_vm_ioctl(kvm_state, KVM_SET_TSC_KHZ, sev_snp_guest->tsc_khz);
+ }
+ if (rc < 0) {
+ error_report("%s: Unable to set Secure TSC frequency to %u kHz ret=%d",
+ __func__, sev_snp_guest->tsc_khz, rc);
+ return 1;
+ }
+ }
+
rc = sev_ioctl(sev_common->sev_fd, KVM_SEV_SNP_LAUNCH_START,
start, &fw_error);
if (rc < 0) {
@@ -3131,6 +3152,28 @@ static void sev_snp_guest_set_secure_tsc(Object *obj, bool value, Error **errp)
sev_set_feature(SEV_COMMON(obj), SVM_SEV_FEAT_SECURE_TSC, value);
}
+static void
+sev_snp_guest_get_tsc_frequency(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+ uint32_t value = SEV_SNP_GUEST(obj)->tsc_khz * 1000;
+
+ visit_type_uint32(v, name, &value, errp);
+}
+
+static void
+sev_snp_guest_set_tsc_frequency(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+ uint32_t value;
+
+ if (!visit_type_uint32(v, name, &value, errp)) {
+ return;
+ }
+
+ SEV_SNP_GUEST(obj)->tsc_khz = value / 1000;
+}
+
static void
sev_snp_guest_class_init(ObjectClass *oc, const void *data)
{
@@ -3169,6 +3212,9 @@ sev_snp_guest_class_init(ObjectClass *oc, const void *data)
object_class_property_add_bool(oc, "secure-tsc",
sev_snp_guest_get_secure_tsc,
sev_snp_guest_set_secure_tsc);
+ object_class_property_add(oc, "tsc-frequency", "uint32",
+ sev_snp_guest_get_tsc_frequency,
+ sev_snp_guest_set_tsc_frequency, NULL, NULL);
}
static void
diff --git a/qapi/qom.json b/qapi/qom.json
index 52c23e85e349..c01ae70dd43d 100644
--- a/qapi/qom.json
+++ b/qapi/qom.json
@@ -1103,6 +1103,9 @@
# @secure-tsc: enable Secure TSC
# (default: false) (since 10.2)
#
+# @tsc-frequency: set secure TSC frequency. Only valid if Secure TSC
+# is enabled (default: zero) (since 10.2)
+#
# Since: 9.1
##
{ 'struct': 'SevSnpGuestProperties',
@@ -1115,7 +1118,8 @@
'*author-key-enabled': 'bool',
'*host-data': 'str',
'*vcek-disabled': 'bool',
- '*secure-tsc': 'bool' } }
+ '*secure-tsc': 'bool',
+ '*tsc-frequency': 'uint32' } }
##
# @TdxGuestProperties:
--
2.51.0
next prev parent reply other threads:[~2025-09-25 10:30 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-25 10:17 [PATCH v2 0/9] target/i386: SEV: Add support for enabling VMSA SEV features Naveen N Rao (AMD)
2025-09-25 10:17 ` [PATCH v2 1/9] target/i386: SEV: Generalize handling of SVM_SEV_FEAT_SNP_ACTIVE Naveen N Rao (AMD)
2025-09-25 10:17 ` [PATCH v2 2/9] target/i386: SEV: Ensure SEV features are only set through qemu cli or IGVM Naveen N Rao (AMD)
2025-09-25 10:17 ` [PATCH v2 3/9] target/i386: SEV: Consolidate SEV feature validation to common init path Naveen N Rao (AMD)
2025-09-25 10:17 ` [PATCH v2 4/9] target/i386: SEV: Validate that SEV-ES is enabled when VMSA features are used Naveen N Rao (AMD)
2025-09-25 10:17 ` [PATCH v2 5/9] target/i386: SEV: Enable use of KVM_SEV_INIT2 for SEV-ES guests Naveen N Rao (AMD)
2025-09-25 10:17 ` [PATCH v2 6/9] target/i386: SEV: Add support for enabling debug-swap SEV feature Naveen N Rao (AMD)
2025-10-07 6:14 ` Markus Armbruster
2025-10-08 8:20 ` Naveen N Rao
2025-09-25 10:17 ` [PATCH v2 7/9] target/i386: SEV: Add support for enabling Secure TSC " Naveen N Rao (AMD)
2025-09-25 10:17 ` Naveen N Rao (AMD) [this message]
2025-10-07 13:31 ` [PATCH v2 8/9] target/i386: SEV: Add support for setting TSC frequency for Secure TSC Tom Lendacky
2025-10-08 9:52 ` Naveen N Rao
2025-10-24 15:00 ` Tom Lendacky
2025-10-24 17:16 ` Naveen N Rao
2025-10-28 15:11 ` Tom Lendacky
2025-09-25 10:17 ` [PATCH v2 9/9] target/i386: SEV: Refactor check_sev_features() Naveen N Rao (AMD)
2025-10-24 13:59 ` [PATCH v2 0/9] target/i386: SEV: Add support for enabling VMSA SEV features Naveen N Rao
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