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From: Wilfred Mallawa <wilfred.mallawa@wdc.com>
To: "wilfred.mallawa@opensource.wdc.com"
	<wilfred.mallawa@opensource.wdc.com>,
	 "f4bug@amsat.org" <f4bug@amsat.org>,
	"richard.henderson@linaro.org" <richard.henderson@linaro.org>,
	"alistair@alistair23.me" <alistair@alistair23.me>
Cc: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Subject: Re: [RFC] hw/registerfields: add `FIELDx_1CLEAR()` macro
Date: Sat, 17 Sep 2022 01:14:19 +0000	[thread overview]
Message-ID: <6641286d492ee6faf40d26dbefeb32959b10c8cb.camel@wdc.com> (raw)
In-Reply-To: <d6f71302-864c-b80f-84ea-d1dda4817f80@amsat.org>

Ping!

https://lore.kernel.org/qemu-devel/20220901010220.495112-1-wilfred.mallawa@opensource.wdc.com/
Wilfred

On Fri, 2022-09-02 at 01:18 +0200, Philippe Mathieu-Daudé wrote:
> On 1/9/22 07:32, Richard Henderson wrote:
> > On 9/1/22 02:02, Wilfred Mallawa wrote:
> > > From: Wilfred Mallawa <wilfred.mallawa@wdc.com>
> > > 
> > > Adds a helper macro that implements the `rw1c`
> > > behaviour.
> > > 
> > > Ex:
> > >    uint32_t data = FIELD32_1CLEAR(val, REG, FIELD);
> > > 
> > > if the specified `FIELD` is set (single/multi bit all fields)
> > > then the respective field is cleared and returned to `data`.
> > > 
> > > If ALL bits of the bitfield are not set, then no change and
> > > val is returned.
> > > 
> > > Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
> > 
> > Why do these operations need to go into hw/registerfields.h?
> > It's not a common operation, since we've never needed it so far.
> 
> I suggested it to improve readability of this patch:
> https://lore.kernel.org/qemu-devel/c33257a3-645f-9386-52e5-21a15ef0ebe5@amsat.org/
> 
> > > ---
> > >   include/hw/registerfields.h | 28 ++++++++++++++++++++++++++++
> > >   1 file changed, 28 insertions(+)
> > > 
> > > diff --git a/include/hw/registerfields.h
> > > b/include/hw/registerfields.h
> > > index 1330ca77de..5a804f72e3 100644
> > > --- a/include/hw/registerfields.h
> > > +++ b/include/hw/registerfields.h
> > > @@ -115,6 +115,34 @@
> > >                     R_ ## reg ## _ ## field ## _LENGTH, 
> > > _v.v);              \
> > >       _d; })
> > > +/* Get the max value (uint) discribed by `num_bits` bits */
> > > +#define MAX_N_BITS(num_bits) ((1 << (num_bits)) - 1)
> > > +
> > > +/*
> > > + * Clear the specified field in reg_val if
> > > + * all field bits are set, else no changes made. Implements
> > > + * single/multi-bit `rw1c`
> > > + */
> > > +#define FIELD8_1CLEAR(reg_val, reg, 
> > > field)                                \
> > > +    ((FIELD_EX8(reg_val, reg, field) 
> > > ==                                   \
> > > +      MAX_N_BITS(R_ ## reg ## _ ## field ## _LENGTH)) 
> > > ?                   \
> > > +      FIELD_DP8(reg_val, reg, field, 0x00) : reg_val)
> > > +
> > > +#define FIELD16_1CLEAR(reg_val, reg, 
> > > field)                               \
> > > +    ((FIELD_EX16(reg_val, reg, field) 
> > > ==                                  \
> > > +      MAX_N_BITS(R_ ## reg ## _ ## field ## _LENGTH)) 
> > > ?                   \
> > > +      FIELD_DP16(reg_val, reg, field, 0x00) : reg_val)
> > > +
> > > +#define FIELD32_1CLEAR(reg_val, reg, 
> > > field)                               \
> > > +    ((FIELD_EX32(reg_val, reg, field) 
> > > ==                                  \
> > > +      MAX_N_BITS(R_ ## reg ## _ ## field ## _LENGTH)) 
> > > ?                   \
> > > +      FIELD_DP32(reg_val, reg, field, 0x00) : reg_val)
> > > +
> > > +#define FIELD64_1CLEAR(reg_val, reg, 
> > > field)                               \
> > > +    ((FIELD_EX64(reg_val, reg, field) 
> > > ==                                  \
> > > +      MAX_N_BITS(R_ ## reg ## _ ## field ## _LENGTH)) 
> > > ?                   \
> > > +      FIELD_DP64(reg_val, reg, field, 0x00) : reg_val)
> > > +
> > >   #define FIELD_SDP8(storage, reg, field, val) 
> > > ({                           \
> > >       struct 
> > > {                                                              \
> > >           signed int v:R_ ## reg ## _ ## field ## 
> > > _LENGTH;                  \
> > 
> > 
> 


  reply	other threads:[~2022-09-17  1:16 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-01  1:02 [RFC] hw/registerfields: add `FIELDx_1CLEAR()` macro Wilfred Mallawa
2022-09-01  5:32 ` Richard Henderson
2022-09-01 23:18   ` Philippe Mathieu-Daudé via
2022-09-17  1:14     ` Wilfred Mallawa [this message]
2022-09-23  4:32 ` Alistair Francis

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