From: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
To: "Zhao Liu" <zhao1.liu@intel.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Daniel P . Berrangé" <berrange@redhat.com>,
"Igor Mammedov" <imammedo@redhat.com>,
"Eduardo Habkost" <eduardo@habkost.net>
Cc: Ewan Hai <ewanhai-oc@zhaoxin.com>,
Jason Zeng <jason.zeng@intel.com>,
Xiaoyao Li <xiaoyao.li@intel.com>, Tao Su <tao1.su@intel.com>,
Yi Lai <yi1.lai@intel.com>, Dapeng Mi <dapeng1.mi@intel.com>,
Tejus GK <tejus.gk@nutanix.com>,
Manish Mishra <manish.mishra@nutanix.com>,
qemu-devel@nongnu.org
Subject: Re: [PATCH 5/8] i386/cpu: Add a "x-force-cpuid-0x1f" property
Date: Fri, 4 Jul 2025 11:38:50 +0800 [thread overview]
Message-ID: <66b72834-860c-4104-870a-5f40d86afa1b@linux.intel.com> (raw)
In-Reply-To: <20250626083105.2581859-6-zhao1.liu@intel.com>
On 6/26/2025 4:31 PM, Zhao Liu wrote:
> From: Manish Mishra <manish.mishra@nutanix.com>
>
> Add a "x-force-cpuid-0x1f" property so that CPU models can enable it and
> have 0x1f CPUID leaf natually as the Host CPU.
>
> The advantage is that when the CPU model's cache model is already
> consistent with the Host CPU, for example, SRF defaults to l2 per
> module & l3 per package, 0x1f can better help users identify the
> topology in the VM.
>
> Adding 0x1f for specific CPU models should not cause any trouble in
> principle. This property is only enabled for CPU models that already
> have 0x1f leaf on the Host, so software that originally runs normally on
> the Host won't encounter issues in the Guest with corresponding CPU
> model. Conversely, some software that relies on checking 0x1f might
> have problems in the Guest due to the lack of 0x1f [*]. In
> summary, adding 0x1f is also intended to further emulate the Host CPU
> environment.
>
> [*]: https://lore.kernel.org/qemu-devel/PH0PR02MB738410511BF51B12DB09BE6CF6AC2@PH0PR02MB7384.namprd02.prod.outlook.com/
>
> Signed-off-by: Manish Mishra <manish.mishra@nutanix.com>
> Co-authored-by: Xiaoyao Li <xiaoyao.li@intel.com>
> Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
> [Integrated and rebased 2 previous patches (ordered by post time)]
> Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
> ---
> Note:
> This patch integrates the idea from 2 previous posted patches (ordered
> by post time)[1] [2], following the s-o-b policy of "Re-starting
> abandoned work" in docs/devel/code-provenance.rst.
>
> [1]: From Manish: https://lore.kernel.org/qemu-devel/20240722101859.47408-1-manish.mishra@nutanix.com/
> [2]: From Xiaoyao: https://lore.kernel.org/qemu-devel/20240813033145.279307-1-xiaoyao.li@intel.com/
> ---
> Changes since RFC:
> * Rebase and rename the property as "x-force-cpuid-0x1f". (Igor)
> ---
> target/i386/cpu.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 08c84ba90f52..ee36f7ee2ccc 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -9934,6 +9934,7 @@ static const Property x86_cpu_properties[] = {
> DEFINE_PROP_BOOL("x-intel-pt-auto-level", X86CPU, intel_pt_auto_level,
> true),
> DEFINE_PROP_BOOL("x-l1-cache-per-thread", X86CPU, l1_cache_per_core, true),
> + DEFINE_PROP_BOOL("x-force-cpuid-0x1f", X86CPU, force_cpuid_0x1f, false),
> };
>
> #ifndef CONFIG_USER_ONLY
LGTM.
Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
next prev parent reply other threads:[~2025-07-04 3:39 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-26 8:30 [PATCH 0/8] i386/cpu: Intel cache model & topo CPUID enhencement Zhao Liu
2025-06-26 8:30 ` [PATCH 1/8] i386/cpu: Introduce cache model for SierraForest Zhao Liu
2025-07-04 3:33 ` Mi, Dapeng
2025-07-07 0:57 ` Tao Su
2025-06-26 8:30 ` [PATCH 2/8] i386/cpu: Introduce cache model for GraniteRapids Zhao Liu
2025-07-04 3:34 ` Mi, Dapeng
2025-07-07 0:58 ` Tao Su
2025-06-26 8:31 ` [PATCH 3/8] i386/cpu: Introduce cache model for SapphireRapids Zhao Liu
2025-07-04 3:35 ` Mi, Dapeng
2025-07-07 0:58 ` Tao Su
2025-06-26 8:31 ` [PATCH 4/8] i386/cpu: Introduce cache model for YongFeng Zhao Liu
2025-06-29 9:47 ` Ewan Hai
2025-07-02 6:35 ` Zhao Liu
2025-07-02 9:35 ` Ewan Hai
2025-06-26 8:31 ` [PATCH 5/8] i386/cpu: Add a "x-force-cpuid-0x1f" property Zhao Liu
2025-06-26 12:07 ` Ewan Hai
2025-06-27 3:05 ` Zhao Liu
2025-06-27 6:48 ` Ewan Hai
2025-06-27 10:00 ` Zhao Liu
2025-07-04 3:38 ` Mi, Dapeng [this message]
2025-06-26 8:31 ` [PATCH 6/8] i386/cpu: Enable 0x1f leaf for SierraForest by default Zhao Liu
2025-07-04 3:45 ` Mi, Dapeng
2025-06-26 8:31 ` [PATCH 7/8] i386/cpu: Enable 0x1f leaf for GraniteRapids " Zhao Liu
2025-07-04 3:47 ` Mi, Dapeng
2025-06-26 8:31 ` [PATCH 8/8] i386/cpu: Enable 0x1f leaf for SapphireRapids " Zhao Liu
2025-07-04 3:48 ` Mi, Dapeng
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=66b72834-860c-4104-870a-5f40d86afa1b@linux.intel.com \
--to=dapeng1.mi@linux.intel.com \
--cc=berrange@redhat.com \
--cc=dapeng1.mi@intel.com \
--cc=eduardo@habkost.net \
--cc=ewanhai-oc@zhaoxin.com \
--cc=imammedo@redhat.com \
--cc=jason.zeng@intel.com \
--cc=manish.mishra@nutanix.com \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=tao1.su@intel.com \
--cc=tejus.gk@nutanix.com \
--cc=xiaoyao.li@intel.com \
--cc=yi1.lai@intel.com \
--cc=zhao1.liu@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).