From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Gavin Shan <gshan@redhat.com>, qemu-arm@nongnu.org
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
qemu-ppc@nongnu.org, imp@bsdimp.com, kevans@freebsd.org,
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shan.gavin@gmail.com
Subject: Re: [PATCH v5 30/31] hw/arm: Check CPU type in machine_run_board_init()
Date: Thu, 16 Nov 2023 09:35:57 +0100 [thread overview]
Message-ID: <67796dee-ddc1-48db-b127-1969319ea9e3@linaro.org> (raw)
In-Reply-To: <20231114235628.534334-31-gshan@redhat.com>
Hi Gavin,
On 15/11/23 00:56, Gavin Shan wrote:
> Set mc->valid_cpu_types so that the user specified CPU type can
> be validated in machine_run_board_init(). We needn't to do it by
> ourselves.
>
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> hw/arm/bananapi_m2u.c | 12 ++++++------
> hw/arm/cubieboard.c | 12 ++++++------
> hw/arm/mps2-tz.c | 20 ++++++++++++++------
> hw/arm/mps2.c | 25 +++++++++++++++++++------
> hw/arm/msf2-som.c | 12 ++++++------
> hw/arm/musca.c | 13 ++++++-------
> hw/arm/npcm7xx_boards.c | 13 ++++++-------
> hw/arm/orangepi.c | 12 ++++++------
> 8 files changed, 69 insertions(+), 50 deletions(-)
> diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
> index 668db5ed61..1c88e76a22 100644
> --- a/hw/arm/mps2-tz.c
> +++ b/hw/arm/mps2-tz.c
> @@ -191,6 +191,16 @@ OBJECT_DECLARE_TYPE(MPS2TZMachineState, MPS2TZMachineClass, MPS2TZ_MACHINE)
> /* For cpu{0,1}_mpu_{ns,s}, means "leave at SSE's default value" */
> #define MPU_REGION_DEFAULT UINT32_MAX
>
> +static const char * const valid_cpu_types[] = {
Generic variable name,
> + ARM_CPU_TYPE_NAME("cortex-m33"),
> + NULL
> +};
> +
> +static const char * const mps3tz_an547_valid_cpu_types[] = {
then specific, is a bit confusing.
Better declare the array in the machine_class_init() methods ...
> + ARM_CPU_TYPE_NAME("cortex-m55"),
> + NULL
> +};
> +
> static const uint32_t an505_oscclk[] = {
> 40000000,
> 24580000,
> @@ -813,12 +823,6 @@ static void mps2tz_common_init(MachineState *machine)
> int num_ppcs;
> int i;
>
> - if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
> - error_report("This board can only be used with CPU %s",
> - mc->default_cpu_type);
> - exit(1);
> - }
> -
> if (machine->ram_size != mc->default_ram_size) {
> char *sz = size_to_str(mc->default_ram_size);
> error_report("Invalid RAM size, should be %s", sz);
> @@ -1325,6 +1329,7 @@ static void mps2tz_an505_class_init(ObjectClass *oc, void *data)
... here. See for example
https://lore.kernel.org/qemu-devel/20231115232154.4515-2-philmd@linaro.org/.
> mc->max_cpus = mc->default_cpus;
> mmc->fpga_type = FPGA_AN505;
> mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
> + mc->valid_cpu_types = valid_cpu_types;
> mmc->scc_id = 0x41045050;
> mmc->sysclk_frq = 20 * 1000 * 1000; /* 20MHz */
> mmc->apb_periph_frq = mmc->sysclk_frq;
> @@ -1354,6 +1359,7 @@ static void mps2tz_an521_class_init(ObjectClass *oc, void *data)
> mc->max_cpus = mc->default_cpus;
> mmc->fpga_type = FPGA_AN521;
> mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
> + mc->valid_cpu_types = valid_cpu_types;
> mmc->scc_id = 0x41045210;
> mmc->sysclk_frq = 20 * 1000 * 1000; /* 20MHz */
> mmc->apb_periph_frq = mmc->sysclk_frq;
> @@ -1383,6 +1389,7 @@ static void mps3tz_an524_class_init(ObjectClass *oc, void *data)
> mc->max_cpus = mc->default_cpus;
> mmc->fpga_type = FPGA_AN524;
> mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
> + mc->valid_cpu_types = valid_cpu_types;
> mmc->scc_id = 0x41045240;
> mmc->sysclk_frq = 32 * 1000 * 1000; /* 32MHz */
> mmc->apb_periph_frq = mmc->sysclk_frq;
> @@ -1417,6 +1424,7 @@ static void mps3tz_an547_class_init(ObjectClass *oc, void *data)
> mc->max_cpus = mc->default_cpus;
> mmc->fpga_type = FPGA_AN547;
> mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m55");
> + mc->valid_cpu_types = mps3tz_an547_valid_cpu_types;
> mmc->scc_id = 0x41055470;
> mmc->sysclk_frq = 32 * 1000 * 1000; /* 32MHz */
> mmc->apb_periph_frq = 25 * 1000 * 1000; /* 25MHz */
next prev parent reply other threads:[~2023-11-16 8:36 UTC|newest]
Thread overview: 102+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
2023-11-14 23:55 ` [PATCH v5 01/31] target/alpha: Remove 'ev67' CPU class Gavin Shan
2023-11-15 0:22 ` Richard Henderson
2023-11-16 6:58 ` Philippe Mathieu-Daudé
2024-01-04 17:58 ` Philippe Mathieu-Daudé
2024-01-04 18:03 ` Philippe Mathieu-Daudé
2024-01-04 18:12 ` Philippe Mathieu-Daudé
2023-11-14 23:55 ` [PATCH v5 02/31] target/hppa: Remove object_class_is_abstract() Gavin Shan
2023-11-15 0:26 ` Richard Henderson
2023-11-15 11:18 ` BALATON Zoltan
2023-11-15 11:24 ` Gavin Shan
2023-11-15 11:27 ` BALATON Zoltan
2023-11-16 7:09 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 03/31] cpu: Call object_class_dynamic_cast() once in cpu_class_by_name() Gavin Shan
2023-11-15 0:30 ` Richard Henderson
2023-11-16 16:08 ` Philippe Mathieu-Daudé
2023-11-16 23:13 ` Gavin Shan
2023-11-14 23:56 ` [PATCH v5 04/31] target: Remove 'oc == NULL' check Gavin Shan
2023-11-15 0:34 ` Richard Henderson
2023-11-14 23:56 ` [PATCH v5 05/31] cpu: Add helper cpu_model_from_type() Gavin Shan
2023-11-15 0:35 ` Richard Henderson
2023-11-16 7:45 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 06/31] cpu: Add generic cpu_list() Gavin Shan
2023-11-15 0:37 ` Richard Henderson
2023-11-16 7:39 ` Philippe Mathieu-Daudé
2023-11-16 7:51 ` Philippe Mathieu-Daudé
2023-11-16 10:19 ` Philippe Mathieu-Daudé
2023-11-16 10:25 ` Philippe Mathieu-Daudé
2023-11-16 10:37 ` Gavin Shan
2023-11-16 10:34 ` Gavin Shan
2023-11-16 13:22 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 07/31] target/alpha: Use " Gavin Shan
2023-11-15 0:38 ` Richard Henderson
2023-11-16 7:47 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 08/31] target/arm: " Gavin Shan
2023-11-15 0:41 ` Richard Henderson
2023-11-16 7:51 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 09/31] target/avr: " Gavin Shan
2023-11-15 0:42 ` Richard Henderson
2023-11-16 7:51 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 10/31] target/cris: " Gavin Shan
2023-11-15 0:44 ` Richard Henderson
2023-11-16 7:52 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 11/31] target/hexagon: " Gavin Shan
2023-11-15 0:46 ` Richard Henderson
2023-11-16 7:52 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 12/31] target/hppa: " Gavin Shan
2023-11-15 0:57 ` Richard Henderson
2023-11-16 7:52 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 13/31] target/loongarch: " Gavin Shan
2023-11-15 0:59 ` Richard Henderson
2023-11-16 10:27 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 14/31] target/m68k: " Gavin Shan
2023-11-15 1:01 ` Richard Henderson
2023-11-16 10:27 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 15/31] target/mips: " Gavin Shan
2023-11-15 1:02 ` Richard Henderson
2023-11-16 7:53 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 16/31] target/openrisc: " Gavin Shan
2023-11-15 1:04 ` Richard Henderson
2023-11-16 10:28 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 17/31] target/riscv: " Gavin Shan
2023-11-15 1:05 ` Richard Henderson
2023-11-16 10:28 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 18/31] target/rx: " Gavin Shan
2023-11-15 1:07 ` Richard Henderson
2023-11-16 7:54 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 19/31] target/sh4: " Gavin Shan
2023-11-15 1:08 ` Richard Henderson
2023-11-16 7:55 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 20/31] target/tricore: " Gavin Shan
2023-11-15 1:09 ` Richard Henderson
2023-11-16 7:55 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 21/31] target/xtensa: " Gavin Shan
2023-11-15 1:12 ` Richard Henderson
2023-11-16 13:29 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 22/31] target: Use generic cpu_model_from_type() Gavin Shan
2023-11-15 1:17 ` Richard Henderson
2023-11-16 13:32 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 23/31] machine: Constify MachineClass::valid_cpu_types[i] Gavin Shan
2023-11-15 1:17 ` Richard Henderson
2023-11-16 9:52 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 24/31] machine: Use error handling when CPU type is checked Gavin Shan
2023-11-15 1:21 ` Richard Henderson
2023-11-15 1:26 ` Richard Henderson
2023-11-14 23:56 ` [PATCH v5 25/31] machine: Introduce helper is_cpu_type_supported() Gavin Shan
2023-11-16 9:33 ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 26/31] machine: Print CPU model name instead of CPU type name Gavin Shan
2023-11-15 1:32 ` Richard Henderson
2023-11-14 23:56 ` [PATCH v5 27/31] hw/arm/virt: Hide host CPU model for tcg Gavin Shan
2023-11-14 23:56 ` [PATCH v5 28/31] hw/arm/virt: Check CPU type in machine_run_board_init() Gavin Shan
2023-11-14 23:56 ` [PATCH v5 29/31] hw/arm/sbsa-ref: " Gavin Shan
2023-11-14 23:56 ` [PATCH v5 30/31] hw/arm: " Gavin Shan
2023-11-16 8:35 ` Philippe Mathieu-Daudé [this message]
2023-11-14 23:56 ` [PATCH v5 31/31] hw/riscv/shakti_c: " Gavin Shan
2023-11-16 10:01 ` [PATCH v5 00/31] Unified CPU type check Philippe Mathieu-Daudé
2023-11-16 10:12 ` Gavin Shan
2023-11-16 13:35 ` Philippe Mathieu-Daudé
2023-11-16 16:20 ` Philippe Mathieu-Daudé
2023-11-16 23:26 ` Gavin Shan
2023-11-17 7:34 ` Philippe Mathieu-Daudé
2023-11-18 6:40 ` Gavin Shan
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