From: WANG Xuerui <i.qemu@xen0n.name>
To: gaosong <gaosong@loongson.cn>
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"XiaoJuan Yang" <yangxiaojuan@loongson.cn>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Laurent Vivier" <laurent@vivier.eu>,
qemu-devel@nongnu.org, "Alex Bennée" <alex.bennee@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: Re: [PATCH v11 29/31] linux-user: Implement CPU-specific signal handler for loongarch64 hosts
Date: Thu, 30 Dec 2021 11:50:22 +0800 [thread overview]
Message-ID: <67ac3255-30d3-783e-cf9b-db2e8e84b162@xen0n.name> (raw)
In-Reply-To: <1d837c79-e939-f540-0a31-759975b43560@loongson.cn>
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Hi,
On 12/30/21 11:11, gaosong wrote:
>
> HI,
>
> On 2021/12/21 下午1:41, WANG Xuerui wrote:
>> + case 0b001110: /* indexed, atomic, bounds-checking memory operations */
>> + uint32_t sel = (insn >> 15) & 0b11111111111;
>> +
>> + switch (sel) {
>> + case 0b00000100000: /* stx.b */
>> + case 0b00000101000: /* stx.h */
>> + case 0b00000110000: /* stx.w */
>> + case 0b00000111000: /* stx.d */
>> + case 0b00001110000: /* fstx.s */
>> + case 0b00001111000: /* fstx.d */
>> + case 0b00011101100: /* fstgt.s */
>> + case 0b00011101101: /* fstgt.d */
>> + case 0b00011101110: /* fstle.s */
>> + case 0b00011101111: /* fstle.d */
>> + case 0b00011111000: /* stgt.b */
>> + case 0b00011111001: /* stgt.h */
>> + case 0b00011111010: /* stgt.w */
>> + case 0b00011111011: /* stgt.d */
>> + case 0b00011111100: /* stle.b */
>> + case 0b00011111101: /* stle.h */
>> + case 0b00011111110: /* stle.w */
>> + case 0b00011111111: /* stle.d */
>> + case 0b00011000000 ... 0b00011100011: /* am* insns */
>> + return true;
>> + }
>> + break;
>> + }
> We build qemu-x86_64 on LoongArch machine, but got an error,
> ../linux-user/host/loongarch64/host-signal.h:57:9: error: a label can only be part of a statement and a declaration is not a statement
> uint32_t sel = (insn >> 15) & 0b11111111111;
> ^~~~~~~~
> I think we should define 'sel' before:
> /* Detect store by reading the instruction at the program counter. */
> switch ((insn >> 26) & 0b111111) {
> or
> case 0b001110:
> {
> uint32_t set = ...;
> ...
> }
I can't reproduce the error on both my development machines (amd64 and
loongarch64), so I wonder if the issue is related to your particular
setup (i.e. compiler versions and such)?
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next prev parent reply other threads:[~2021-12-30 3:51 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-21 5:40 [PATCH v11 00/31] LoongArch64 port of QEMU TCG WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 01/31] elf: Add machine type value for LoongArch WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 02/31] MAINTAINERS: Add tcg/loongarch64 entry with myself as maintainer WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 03/31] tcg/loongarch64: Add the tcg-target.h file WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 04/31] tcg/loongarch64: Add generated instruction opcodes and encoding helpers WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 05/31] tcg/loongarch64: Add register names, allocation order and input/output sets WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 06/31] tcg/loongarch64: Define the operand constraints WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 07/31] tcg/loongarch64: Implement necessary relocation operations WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 08/31] tcg/loongarch64: Implement the memory barrier op WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 09/31] tcg/loongarch64: Implement tcg_out_mov and tcg_out_movi WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 10/31] tcg/loongarch64: Implement goto_ptr WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 11/31] tcg/loongarch64: Implement sign-/zero-extension ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 12/31] tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 13/31] tcg/loongarch64: Implement deposit/extract ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 14/31] tcg/loongarch64: Implement bswap{16,32,64} ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 15/31] tcg/loongarch64: Implement clz/ctz ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 16/31] tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 17/31] tcg/loongarch64: Implement add/sub ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 18/31] tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 19/31] tcg/loongarch64: Implement br/brcond ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 20/31] tcg/loongarch64: Implement setcond ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 21/31] tcg/loongarch64: Implement tcg_out_call WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 22/31] tcg/loongarch64: Implement simple load/store ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 23/31] tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 24/31] tcg/loongarch64: Implement tcg_target_qemu_prologue WANG Xuerui
2021-12-21 5:40 ` [PATCH v11 25/31] tcg/loongarch64: Implement exit_tb/goto_tb WANG Xuerui
2021-12-21 5:41 ` [PATCH v11 26/31] tcg/loongarch64: Implement tcg_target_init WANG Xuerui
2021-12-21 5:41 ` [PATCH v11 27/31] tcg/loongarch64: Register the JIT WANG Xuerui
2021-12-21 5:41 ` [PATCH v11 28/31] common-user: Add safe syscall handling for loongarch64 hosts WANG Xuerui
2021-12-21 5:41 ` [PATCH v11 29/31] linux-user: Implement CPU-specific signal handler " WANG Xuerui
2021-12-30 3:11 ` gaosong
2021-12-30 3:50 ` WANG Xuerui [this message]
2022-01-04 12:48 ` Philippe Mathieu-Daudé
2021-12-21 5:41 ` [PATCH v11 30/31] configure, meson.build: Mark support " WANG Xuerui
2021-12-21 5:41 ` [PATCH v11 31/31] tests/docker: Add gentoo-loongarch64-cross image and run cross builds in GitLab WANG Xuerui
2021-12-21 8:44 ` [PATCH v11 00/31] LoongArch64 port of QEMU TCG Philippe Mathieu-Daudé
2021-12-21 9:36 ` gaosong
2021-12-21 12:00 ` Philippe Mathieu-Daudé
2021-12-23 2:00 ` gaosong
2021-12-21 16:49 ` Richard Henderson
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