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Wed, 15 Oct 2025 07:55:27 GMT Received: from smtprelay03.fra02v.mail.ibm.com ([9.218.2.224]) by ppma11.dal12v.mail.ibm.com (PPS) with ESMTPS id 49s3rf8tee-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 15 Oct 2025 07:55:27 +0000 Received: from smtpav02.fra02v.mail.ibm.com (smtpav02.fra02v.mail.ibm.com [10.20.54.101]) by smtprelay03.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 59F7tO3h39518518 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 15 Oct 2025 07:55:24 GMT Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E52AA20220; Wed, 15 Oct 2025 07:28:37 +0000 (GMT) Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 47D292021F; Wed, 15 Oct 2025 07:28:37 +0000 (GMT) Received: from [127.0.0.1] (unknown [9.111.38.145]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 15 Oct 2025 07:28:37 +0000 (GMT) Message-ID: <67f6a9617a0f128e75e0c8049041e81102518a16.camel@linux.ibm.com> Subject: Re: [PATCH 2/3] target/s390x: Fix missing clock-comparator interrupts after reset From: Ilya Leoshkevich To: Thomas Huth , Richard Henderson , David Hildenbrand Cc: qemu-s390x@nongnu.org, qemu-devel@nongnu.org Date: Wed, 15 Oct 2025 09:28:36 +0200 In-Reply-To: <20251014160743.398093-3-iii@linux.ibm.com> References: <20251014160743.398093-1-iii@linux.ibm.com> <20251014160743.398093-3-iii@linux.ibm.com> Content-Type: text/plain; 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envelope-from=iii@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Tue, 2025-10-14 at 18:05 +0200, Ilya Leoshkevich wrote: > After reset, both TOD and CKC values are set to 0, so if ^^^ This is inaccurate, only the TOD programmable register is set to 0. I will fix this in v2. > clock-comparator interrupts are enabled, one should occur shortly > thereafter. >=20 > Currently the code does not set tod_timer, so this does not happen. >=20 > Fix by adding a tcg_s390_tod_updated() call. Initialize TOD clock > before CPUs in order to ensure that the respective object exists > during the CPU reset. >=20 > Signed-off-by: Ilya Leoshkevich > --- > =C2=A0hw/s390x/s390-virtio-ccw.c | 6 +++--- > =C2=A0target/s390x/cpu.c=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 = | 8 ++++++++ > =C2=A02 files changed, 11 insertions(+), 3 deletions(-) [...]