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Tue, 04 Jun 2024 01:32:04 -0700 (PDT) Message-ID: <681cf91c-dec7-44ab-91a3-efb6decc98e1@linaro.org> Date: Tue, 4 Jun 2024 10:32:02 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] target/riscv: rvzicbo: Fixup CBO extension register calculation To: Alistair Francis , Daniel Henrique Barboza Cc: qemu-riscv@nongnu.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@dabbelt.com, bin.meng@windriver.com, qemu-devel@nongnu.org, Alistair Francis , fabian.thomas@cispa.de, Bin Meng , Richard Henderson References: <20240514023910.301766-1-alistair.francis@wdc.com> <14e88990-963c-45ef-bf51-662d54857c6e@ventanamicro.com> Content-Language: en-US From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::136; envelope-from=philmd@linaro.org; helo=mail-lf1-x136.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 16/5/24 07:09, Alistair Francis wrote: > On Tue, May 14, 2024 at 7:11 PM Daniel Henrique Barboza > wrote: >> >> >> >> On 5/13/24 23:39, Alistair Francis wrote: >>> When running the instruction >>> >>> ``` >>> cbo.flush 0(x0) >>> ``` >>> >>> QEMU would segfault. >>> >>> The issue was in cpu_gpr[a->rs1] as QEMU does not have cpu_gpr[0] >>> allocated. >>> >>> In order to fix this let's use the existing get_address() >>> helper. This also has the benefit of performing pointer mask >>> calculations on the address specified in rs1. >>> >>> The pointer masking specificiation specifically states: >>> >>> """ >>> Cache Management Operations: All instructions in Zicbom, Zicbop and Zicboz >>> """ >>> >>> So this is the correct behaviour and we previously have been incorrectly >>> not masking the address. >>> >>> Signed-off-by: Alistair Francis >>> Reported-by: Fabian Thomas >>> Fixes: e05da09b7cfd ("target/riscv: implement Zicbom extension") Reported-by: Zhiwei Jiang (姜智伟) Reviewed-by: Philippe Mathieu-Daudé >>> --- >> >> LGTM but I wonder if this is the same fix as this one sent by Phil a month >> ago or so: >> >> https://lore.kernel.org/qemu-riscv/20240419110514.69697-1-philmd@linaro.org/ >> ("[PATCH] target/riscv: Use get_address() to get address with Zicbom extensions") > > It is the same fix! > > I somehow missed that patch at the time. Sorry Philippe! > > I'm going to merge this one as it includes the details about pointer > masking, which I think is useful as that's why we are using > get_address() instead of get_gpr() Fine by me :) > Alistair > >> >> >> Thanks, >> >> Daniel >> >>> target/riscv/insn_trans/trans_rvzicbo.c.inc | 16 ++++++++++++---- >>> 1 file changed, 12 insertions(+), 4 deletions(-)