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([2a01:e0a:59e:9d80:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38f259d5d8bsm23512951f8f.70.2025.02.21.06.18.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 21 Feb 2025 06:18:59 -0800 (PST) Message-ID: <6848480a-d588-4b81-a286-4bee983b7831@redhat.com> Date: Fri, 21 Feb 2025 15:18:57 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH rfcv2 11/20] intel_iommu: Check for compatibility with IOMMUFD backed device when x-flts=on Content-Language: en-US From: Eric Auger To: Zhenzhong Duan , qemu-devel@nongnu.org Cc: alex.williamson@redhat.com, clg@redhat.com, mst@redhat.com, jasowang@redhat.com, peterx@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com, shameerali.kolothum.thodi@huawei.com, joao.m.martins@oracle.com, clement.mathieu--drif@eviden.com, kevin.tian@intel.com, yi.l.liu@intel.com, chao.p.peng@intel.com, Paolo Bonzini , Richard Henderson , Eduardo Habkost , Marcel Apfelbaum References: <20250219082228.3303163-1-zhenzhong.duan@intel.com> <20250219082228.3303163-12-zhenzhong.duan@intel.com> In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.424, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 2/21/25 1:49 PM, Eric Auger wrote: > Hi Zhenzhong, > > > On 2/19/25 9:22 AM, Zhenzhong Duan wrote: >> When vIOMMU is configured x-flts=on in scalable mode, stage-1 page table >> is passed to host to construct nested page table. We need to check >> compatibility of some critical IOMMU capabilities between vIOMMU and >> host IOMMU to ensure guest stage-1 page table could be used by host. >> >> For instance, vIOMMU supports stage-1 1GB huge page mapping, but host >> does not, then this IOMMUFD backed device should be failed. > is this 1GB huge page mapping a requiring for SIOV? >> >> Declare an enum type host_iommu_device_iommu_hw_info_type aliased to >> iommu_hw_info_type which come from iommufd header file. This can avoid > s/come/comes >> build failure on windows which doesn't support iommufd. >> >> Signed-off-by: Yi Liu >> Signed-off-by: Zhenzhong Duan >> --- >> include/system/host_iommu_device.h | 13 ++++++++++++ >> hw/i386/intel_iommu.c | 34 ++++++++++++++++++++++++++++++ >> 2 files changed, 47 insertions(+) >> >> diff --git a/include/system/host_iommu_device.h b/include/system/host_iommu_device.h >> index 250600fc1d..aa3885d7ee 100644 >> --- a/include/system/host_iommu_device.h >> +++ b/include/system/host_iommu_device.h >> @@ -133,5 +133,18 @@ struct HostIOMMUDeviceClass { >> #define HOST_IOMMU_DEVICE_CAP_FS1GP 3 >> #define HOST_IOMMU_DEVICE_CAP_ERRATA 4 >> >> +/** >> + * enum host_iommu_device_iommu_hw_info_type - IOMMU Hardware Info Types >> + * @HOST_IOMMU_DEVICE_IOMMU_HW_INFO_TYPE_NONE: Used by the drivers that do not >> + * report hardware info >> + * @HOST_IOMMU_DEVICE_IOMMU_HW_INFO_TYPE_INTEL_VTD: Intel VT-d iommu info type >> + * >> + * This is alias to enum iommu_hw_info_type but for general purpose. >> + */ >> +enum host_iommu_device_iommu_hw_info_type { >> + HOST_IOMMU_DEVICE_IOMMU_HW_INFO_TYPE_NONE, >> + HOST_IOMMU_DEVICE_IOMMU_HW_INFO_TYPE_INTEL_VTD, >> +}; >> + >> #define HOST_IOMMU_DEVICE_CAP_AW_BITS_MAX 64 >> #endif >> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c >> index 7709f55be5..9de60e607d 100644 >> --- a/hw/i386/intel_iommu.c >> +++ b/hw/i386/intel_iommu.c >> @@ -39,6 +39,7 @@ >> #include "kvm/kvm_i386.h" >> #include "migration/vmstate.h" >> #include "trace.h" >> +#include "system/iommufd.h" >> >> /* context entry operations */ >> #define VTD_CE_GET_RID2PASID(ce) \ >> @@ -4346,6 +4347,39 @@ static bool vtd_check_hiod(IntelIOMMUState *s, HostIOMMUDevice *hiod, >> return true; >> } >> >> + /* Remaining checks are all stage-1 translation specific */ >> + if (!object_dynamic_cast(OBJECT(hiod), TYPE_HOST_IOMMU_DEVICE_IOMMUFD)) { >> + error_setg(errp, "Need IOMMUFD backend when x-flts=on"); >> + return false; >> + } >> + >> + ret = hiodc->get_cap(hiod, HOST_IOMMU_DEVICE_CAP_IOMMU_TYPE, errp); >> + if (ret < 0) { >> + return false; > Can't you simply rely on the check below? >> + } >> + if (ret != HOST_IOMMU_DEVICE_IOMMU_HW_INFO_TYPE_INTEL_VTD) { >> + error_setg(errp, "Incompatible host platform IOMMU type %d", ret); >> + return false; >> + } >> + >> + ret = hiodc->get_cap(hiod, HOST_IOMMU_DEVICE_CAP_NESTING, errp); >> + if (ret < 0) { >> + return false; >> + } > same heere >> + if (ret != 1) { >> + error_setg(errp, "Host IOMMU doesn't support nested translation"); >> + return false; >> + } >> + >> + ret = hiodc->get_cap(hiod, HOST_IOMMU_DEVICE_CAP_FS1GP, errp); >> + if (ret < 0) { >> + return false; >> + } >> + if (s->fs1gp && ret != 1) { > looking in the vtd spec I don't find FS1GP. Is it the same as FL1GP? I am now looking at spec rev from june 22 and it seems it has been renamed. So please ignore this comment Eric > Maybe I am not looking the correct spec though. Why do you need to check > both ret and fs1gp > Even why do you need a member to store the cap? Looks FL1GP can only > take 0 or 1 value? >> + error_setg(errp, "Stage-1 1GB huge page is unsupported by host IOMMU"); >> + return false; >> + } >> + >> error_setg(errp, "host device is uncompatible with stage-1 translation"); >> return false; >> } > Eric