From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:32871) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b8ZLi-00075S-LU for qemu-devel@nongnu.org; Thu, 02 Jun 2016 16:36:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b8ZLd-00022a-LB for qemu-devel@nongnu.org; Thu, 02 Jun 2016 16:36:14 -0400 Received: from mail-qg0-x242.google.com ([2607:f8b0:400d:c04::242]:35338) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b8ZLd-00022W-GQ for qemu-devel@nongnu.org; Thu, 02 Jun 2016 16:36:09 -0400 Received: by mail-qg0-x242.google.com with SMTP id t106so331994qgt.2 for ; Thu, 02 Jun 2016 13:36:09 -0700 (PDT) Sender: Richard Henderson References: <20160531183928.29406-1-bobby.prani@gmail.com> <20160531183928.29406-2-bobby.prani@gmail.com> <57505F1A.3020808@gmail.com> From: Richard Henderson Message-ID: <68c32d50-adc2-25b2-b136-2a486f6b3de7@twiddle.net> Date: Thu, 2 Jun 2016 13:36:05 -0700 MIME-Version: 1.0 In-Reply-To: <57505F1A.3020808@gmail.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [RFC v2 PATCH 01/13] Introduce TCGOpcode for memory barrier List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Sergey Fedorov , Pranith Kumar , "open list:All patches CC here" Cc: serge.fdrv@linaro.org, alex.bennee@linaro.org On 06/02/2016 09:30 AM, Sergey Fedorov wrote: > I think we need to extend TCG load/store instruction attributes to > provide information about guest ordering requirements and leave this TCG > operation only for explicit barrier instruction translation. I do not agree. I think separate barriers are much cleaner and easier to manage and reason with. r~