* [PATCH] target/riscv: fix ACPI MCFG table
@ 2024-02-19 16:09 X512 via
2024-02-19 16:43 ` Philippe Mathieu-Daudé
2024-02-23 4:33 ` Alistair Francis
0 siblings, 2 replies; 4+ messages in thread
From: X512 via @ 2024-02-19 16:09 UTC (permalink / raw)
To: qemu-devel
MCFG segments should point to PCI configuration range, not BAR MMIO.
Signed-off-by: Ilya Chugin <danger_mail@list.ru>
---
hw/riscv/virt-acpi-build.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
index fb8baf64f6..fe01b626ea 100644
--- a/hw/riscv/virt-acpi-build.c
+++ b/hw/riscv/virt-acpi-build.c
@@ -558,8 +558,8 @@ static void virt_acpi_build(RISCVVirtState *s,
AcpiBuildTables *tables)
acpi_add_table(table_offsets, tables_blob);
{
AcpiMcfgInfo mcfg = {
- .base = s->memmap[VIRT_PCIE_MMIO].base,
- .size = s->memmap[VIRT_PCIE_MMIO].size,
+ .base = s->memmap[VIRT_PCIE_ECAM].base,
+ .size = s->memmap[VIRT_PCIE_ECAM].size,
};
build_mcfg(tables_blob, tables->linker, &mcfg, s->oem_id,
s->oem_table_id);
--
2.42.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH] target/riscv: fix ACPI MCFG table
2024-02-19 16:09 [PATCH] target/riscv: fix ACPI MCFG table X512 via
@ 2024-02-19 16:43 ` Philippe Mathieu-Daudé
2024-02-20 5:28 ` Sunil V L
2024-02-23 4:33 ` Alistair Francis
1 sibling, 1 reply; 4+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-02-19 16:43 UTC (permalink / raw)
To: X512, qemu-devel; +Cc: qemu-riscv, Sunil V L
On 19/2/24 17:09, X512 via wrote:
> MCFG segments should point to PCI configuration range, not BAR MMIO.
>
Fixes: 55ecd83b36 ("hw/riscv/virt-acpi-build.c: Add IO controllers and
devices")
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Signed-off-by: Ilya Chugin <danger_mail@list.ru>
> ---
> hw/riscv/virt-acpi-build.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
> index fb8baf64f6..fe01b626ea 100644
> --- a/hw/riscv/virt-acpi-build.c
> +++ b/hw/riscv/virt-acpi-build.c
> @@ -558,8 +558,8 @@ static void virt_acpi_build(RISCVVirtState *s,
> AcpiBuildTables *tables)
> acpi_add_table(table_offsets, tables_blob);
> {
> AcpiMcfgInfo mcfg = {
> - .base = s->memmap[VIRT_PCIE_MMIO].base,
> - .size = s->memmap[VIRT_PCIE_MMIO].size,
> + .base = s->memmap[VIRT_PCIE_ECAM].base,
> + .size = s->memmap[VIRT_PCIE_ECAM].size,
> };
> build_mcfg(tables_blob, tables->linker, &mcfg, s->oem_id,
> s->oem_table_id);
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] target/riscv: fix ACPI MCFG table
2024-02-19 16:43 ` Philippe Mathieu-Daudé
@ 2024-02-20 5:28 ` Sunil V L
0 siblings, 0 replies; 4+ messages in thread
From: Sunil V L @ 2024-02-20 5:28 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: X512, qemu-devel, qemu-riscv, Alistair Francis
On Mon, Feb 19, 2024 at 05:43:56PM +0100, Philippe Mathieu-Daudé wrote:
> On 19/2/24 17:09, X512 via wrote:
> > MCFG segments should point to PCI configuration range, not BAR MMIO.
> >
>
> Fixes: 55ecd83b36 ("hw/riscv/virt-acpi-build.c: Add IO controllers and
> devices")
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>
> > Signed-off-by: Ilya Chugin <danger_mail@list.ru>
> > ---
> > hw/riscv/virt-acpi-build.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
> > index fb8baf64f6..fe01b626ea 100644
> > --- a/hw/riscv/virt-acpi-build.c
> > +++ b/hw/riscv/virt-acpi-build.c
> > @@ -558,8 +558,8 @@ static void virt_acpi_build(RISCVVirtState *s,
> > AcpiBuildTables *tables)
> > acpi_add_table(table_offsets, tables_blob);
> > {
> > AcpiMcfgInfo mcfg = {
> > - .base = s->memmap[VIRT_PCIE_MMIO].base,
> > - .size = s->memmap[VIRT_PCIE_MMIO].size,
> > + .base = s->memmap[VIRT_PCIE_ECAM].base,
> > + .size = s->memmap[VIRT_PCIE_ECAM].size,
Thanks!.
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
> > };
> > build_mcfg(tables_blob, tables->linker, &mcfg, s->oem_id,
> > s->oem_table_id);
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] target/riscv: fix ACPI MCFG table
2024-02-19 16:09 [PATCH] target/riscv: fix ACPI MCFG table X512 via
2024-02-19 16:43 ` Philippe Mathieu-Daudé
@ 2024-02-23 4:33 ` Alistair Francis
1 sibling, 0 replies; 4+ messages in thread
From: Alistair Francis @ 2024-02-23 4:33 UTC (permalink / raw)
To: X512; +Cc: qemu-devel
On Tue, Feb 20, 2024 at 2:10 AM X512 via <qemu-devel@nongnu.org> wrote:
>
> MCFG segments should point to PCI configuration range, not BAR MMIO.
>
> Signed-off-by: Ilya Chugin <danger_mail@list.ru>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> hw/riscv/virt-acpi-build.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
> index fb8baf64f6..fe01b626ea 100644
> --- a/hw/riscv/virt-acpi-build.c
> +++ b/hw/riscv/virt-acpi-build.c
> @@ -558,8 +558,8 @@ static void virt_acpi_build(RISCVVirtState *s,
> AcpiBuildTables *tables)
> acpi_add_table(table_offsets, tables_blob);
> {
> AcpiMcfgInfo mcfg = {
> - .base = s->memmap[VIRT_PCIE_MMIO].base,
> - .size = s->memmap[VIRT_PCIE_MMIO].size,
> + .base = s->memmap[VIRT_PCIE_ECAM].base,
> + .size = s->memmap[VIRT_PCIE_ECAM].size,
> };
> build_mcfg(tables_blob, tables->linker, &mcfg, s->oem_id,
> s->oem_table_id);
> --
> 2.42.1
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2024-02-23 4:34 UTC | newest]
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2024-02-19 16:09 [PATCH] target/riscv: fix ACPI MCFG table X512 via
2024-02-19 16:43 ` Philippe Mathieu-Daudé
2024-02-20 5:28 ` Sunil V L
2024-02-23 4:33 ` Alistair Francis
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