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[2003:cb:c740:5d00:5143:1cd2:a300:ceff]) by smtp.gmail.com with ESMTPSA id c10-20020a05600c0aca00b003fe17e04269sm11039689wmr.40.2023.08.07.08.31.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 07 Aug 2023 08:31:38 -0700 (PDT) Message-ID: <6961d8e4-7b26-b205-1ffd-4d4b721fe2e2@redhat.com> Date: Mon, 7 Aug 2023 17:31:37 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH 1/2] target/s390x: Define TARGET_HAS_PRECISE_SMC Content-Language: en-US To: Ilya Leoshkevich , Richard Henderson , Thomas Huth Cc: qemu-s390x@nongnu.org, qemu-devel@nongnu.org References: <20230807114921.438881-1-iii@linux.ibm.com> From: David Hildenbrand Organization: Red Hat In-Reply-To: <20230807114921.438881-1-iii@linux.ibm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=david@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -38 X-Spam_score: -3.9 X-Spam_bar: --- X-Spam_report: (-3.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-1.809, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 07.08.23 13:48, Ilya Leoshkevich wrote: > PoP (Sequence of Storage References -> Instruction Fetching) says: > > ... if a store that is conceptually earlier is > made by the same CPU using the same effective > address as that by which the instruction is subse- > quently fetched, the updated information is obtained ... > > QEMU already has support for this in the common code; enable it for > s390x. Figuring out what TARGET_HAS_PRECISE_SMC is all about, I only learned from git history commit d720b93d0bcfe1beb729245b9ed1e5f071a24bd5 Author: Fabrice Bellard Date: Sun Apr 25 17:57:43 2004 +0000 precise self modifying code support git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@745 c046a42c-6fe2-441c-8c8c-71466251a162 AFAIU, precise SMC is stricter compared to what we have right now. So i suspect that this patch is actually fixing SMC behavior: for example, when a basic block ends up modifying itself. Were there any BUG reports? (does patch #2 test for that and can reproduce the original issue?) > > Signed-off-by: Ilya Leoshkevich > --- > target/s390x/cpu.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h > index eb5b65b7d3a..304029e57cf 100644 > --- a/target/s390x/cpu.h > +++ b/target/s390x/cpu.h > @@ -36,6 +36,8 @@ > /* The z/Architecture has a strong memory model with some store-after-load re-ordering */ > #define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) > > +#define TARGET_HAS_PRECISE_SMC > + > #define TARGET_INSN_START_EXTRA_WORDS 2 > > #define MMU_USER_IDX 0 -- Cheers, David / dhildenb