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From: Richard Henderson <richard.henderson@linaro.org>
To: WANG Xuerui <git@xen0n.name>, qemu-devel@nongnu.org
Subject: Re: [PATCH v2 23/30] tcg/loongarch64: Add softmmu load/store helpers,  implement qemu_ld/qemu_st ops
Date: Wed, 22 Sep 2021 09:29:14 -0700	[thread overview]
Message-ID: <69924e4b-53dc-fd75-db6b-d094cec103b5@linaro.org> (raw)
In-Reply-To: <20210921201915.601245-24-git@xen0n.name>

On 9/21/21 1:19 PM, WANG Xuerui wrote:
> +    /* Compare masked address with the TLB entry.  */
> +    label_ptr[0] = s->code_ptr;
> +    tcg_out_opc_bne(s, TCG_REG_TMP0, TCG_REG_TMP1, 0);
> +
> +    /* TLB Hit - translate address using addend.  */
> +    tcg_out_opc_add_d(s, TCG_REG_TMP0, TCG_REG_TMP2, addrl);

You removed a little too much here.  You still need

     if (TARGET_LONG_BITS == 32) {
         tcg_out_ext32u(s, TCG_REG_TMP0, addrl);
         addrl = TCG_REG_TMP0;
     }
     tcg_out_opc_add_d(s, TCG_REG_TMP0, TCG_REG_TMP2, addrl);

> +static void add_qemu_ldst_label(TCGContext *s, int is_ld, TCGMemOpIdx oi,
> +                                TCGReg datalo, TCGReg addrlo,
> +                                void *raddr, tcg_insn_unit **label_ptr)
> +{
> +    TCGLabelQemuLdst *label = new_ldst_label(s);
> +
> +    label->is_ld = is_ld;
> +    label->oi = oi;
> +    label->type = 0;

Type should be set based on "is_64" argument to tcg_out_qemu_ld (or indeed, is_64 could be 
replaced by "type", which would probably make more sense).

This will be used to fix...

> +    if (opc & MO_SIGN) {
> +        /* Sign-extend directly into destination.  */
> +        switch (size) {
> +        case MO_8:
> +            tcg_out_ext8s(s, l->datalo_reg, TCG_REG_A0);
> +            break;
> +        case MO_16:
> +            tcg_out_ext16s(s, l->datalo_reg, TCG_REG_A0);
> +            break;
> +        case MO_32:
> +            tcg_out_ext32s(s, l->datalo_reg, TCG_REG_A0);
> +            break;
> +        default:
> +            g_assert_not_reached();
> +            break;
> +        }
> +    } else {
> +        tcg_out_mov(s, size == MO_64, l->datalo_reg, TCG_REG_A0);
> +    }

... this, where TCG_TYPE_I32 loads should always be sign-extended from 32-bits.  Something 
like

     switch (opc & MO_SSIZE) {
     case MO_SB:
         ext8s;
         break;
     case MO_SH:
         ext16s;
         break;
     case MO_SL:
         ext32s;
         break;
     case MO_UL:
         if (type == TCG_TYPE_I32) {
             ext32s;
             break;
         }
         /* fall through */
     default:
         tcg_out_mov(s, TCG_TYPE_REG, datalo, A0);
         break;
     }

> +    case MO_64:
> +        tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_A2, l->datalo_reg);

TCG_TYPE_I64, to match MO_64.

> +    if (USE_GUEST_BASE) {
> +        tcg_out_opc_add_d(s, base, TCG_GUEST_BASE_REG, addr_regl);
> +    } else {
> +        tcg_out_opc_add_d(s, base, addr_regl, TCG_REG_ZERO);
> +    }

Still adding zero in tcg_out_qemu_st.


r~


  reply	other threads:[~2021-09-22 18:04 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-21 20:18 [PATCH v2 00/30] LoongArch64 port of QEMU TCG WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 01/30] elf: Add machine type value for LoongArch WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 02/30] MAINTAINERS: Add tcg/loongarch64 entry with myself as maintainer WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 03/30] tcg/loongarch64: Add the tcg-target.h file WANG Xuerui
2021-09-22  3:55   ` Richard Henderson
2021-09-22  4:33     ` WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 04/30] tcg/loongarch64: Add generated instruction opcodes and encoding helpers WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 05/30] tcg/loongarch64: Add register names, allocation order and input/output sets WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 06/30] tcg/loongarch64: Define the operand constraints WANG Xuerui
2021-09-22  3:59   ` Richard Henderson
2021-09-21 20:18 ` [PATCH v2 07/30] tcg/loongarch64: Implement necessary relocation operations WANG Xuerui
2021-09-22  4:02   ` Richard Henderson
2021-09-21 20:18 ` [PATCH v2 08/30] tcg/loongarch64: Implement the memory barrier op WANG Xuerui
2021-09-22  4:03   ` Richard Henderson
2021-09-21 20:18 ` [PATCH v2 09/30] tcg/loongarch64: Implement tcg_out_mov and tcg_out_movi WANG Xuerui
2021-09-22  4:25   ` Richard Henderson
2021-09-22 15:16     ` WANG Xuerui
2021-09-22 15:17       ` Richard Henderson
2021-09-22 17:22         ` WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 10/30] tcg/loongarch64: Implement goto_ptr WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 11/30] tcg/loongarch64: Implement sign-/zero-extension ops WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 12/30] tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc/eqv ops WANG Xuerui
2021-09-22  4:35   ` Richard Henderson
2021-09-22 17:23     ` WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 13/30] tcg/loongarch64: Implement deposit/extract ops WANG Xuerui
2021-09-21 20:18 ` [PATCH v2 14/30] tcg/loongarch64: Implement bswap32_i32/bswap32_i64/bswap64_i64 WANG Xuerui
2021-09-22 14:54   ` Richard Henderson
2021-09-22 17:24     ` WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 15/30] tcg/loongarch64: Implement clz/ctz ops WANG Xuerui
2021-09-22 14:57   ` Richard Henderson
2021-09-21 20:19 ` [PATCH v2 16/30] tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops WANG Xuerui
2021-09-22 14:59   ` Richard Henderson
2021-09-21 20:19 ` [PATCH v2 17/30] tcg/loongarch64: Implement add/sub ops WANG Xuerui
2021-09-22 15:01   ` Richard Henderson
2021-09-21 20:19 ` [PATCH v2 18/30] tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu ops WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 19/30] tcg/loongarch64: Implement br/brcond ops WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 20/30] tcg/loongarch64: Implement setcond ops WANG Xuerui
2021-09-22 15:13   ` Richard Henderson
2021-09-22 17:26     ` WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 21/30] tcg/loongarch64: Implement tcg_out_call WANG Xuerui
2021-09-22 15:16   ` Richard Henderson
2021-09-21 20:19 ` [PATCH v2 22/30] tcg/loongarch64: Implement simple load/store ops WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 23/30] tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops WANG Xuerui
2021-09-22 16:29   ` Richard Henderson [this message]
2021-09-22 17:32     ` WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 24/30] tcg/loongarch64: Implement tcg_target_qemu_prologue WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 25/30] tcg/loongarch64: Implement exit_tb/goto_tb WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 26/30] tcg/loongarch64: Implement tcg_target_init WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 27/30] tcg/loongarch64: Register the JIT WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 28/30] linux-user: Add safe syscall handling for loongarch64 hosts WANG Xuerui
2021-09-22 16:39   ` Richard Henderson
2021-09-21 20:19 ` [PATCH v2 29/30] accel/tcg/user-exec: Implement CPU-specific signal handler " WANG Xuerui
2021-09-22 16:51   ` Richard Henderson
2021-09-22 17:35     ` WANG Xuerui
2021-09-21 20:19 ` [PATCH v2 30/30] configure, meson.build: Mark support " WANG Xuerui
2021-09-22 16:53   ` Richard Henderson

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