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Sun, 18 Aug 2024 20:08:52 -0700 (PDT) Message-ID: <69dc62df-92d6-4dc1-8907-4f4533a08b36@linaro.org> Date: Mon, 19 Aug 2024 13:08:45 +1000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 09/17] bsd-user: Add RISC-V thread setup and initialization support To: Ajeet Singh , qemu-devel@nongnu.org Cc: Mark Corbin , Warner Losh , Ajeet Singh , Jessica Clarke , Kyle Evans References: <20240816170949.238511-1-itachis@FreeBSD.org> <20240816170949.238511-10-itachis@FreeBSD.org> Content-Language: en-US From: Richard Henderson In-Reply-To: <20240816170949.238511-10-itachis@FreeBSD.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2001:4860:4864:20::2b; envelope-from=richard.henderson@linaro.org; helo=mail-oa1-x2b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 8/17/24 03:09, Ajeet Singh wrote: > From: Mark Corbin > > Implemented functions for setting up and initializing threads in the > RISC-V architecture. > The 'target_thread_set_upcall' function sets up the stack pointer, > program counter, and function argument for new threads. > The 'target_thread_init' function initializes thread registers based on > the provided image information. > > Signed-off-by: Mark Corbin > Signed-off-by: Ajeet Singh > Co-authored-by: Jessica Clarke > Co-authored-by: Kyle Evans > --- > bsd-user/riscv/target_arch_thread.h | 47 +++++++++++++++++++++++++++++ > 1 file changed, 47 insertions(+) > create mode 100644 bsd-user/riscv/target_arch_thread.h > > diff --git a/bsd-user/riscv/target_arch_thread.h b/bsd-user/riscv/target_arch_thread.h > new file mode 100644 > index 0000000000..4596d3d51f > --- /dev/null > +++ b/bsd-user/riscv/target_arch_thread.h > @@ -0,0 +1,47 @@ > +/* > + * RISC-V thread support > + * > + * Copyright (c) 2019 Mark Corbin > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License as published by > + * the Free Software Foundation; either version 2 of the License, or > + * (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, see . > + */ > + > +#ifndef TARGET_ARCH_THREAD_H > +#define TARGET_ARCH_THREAD_H > + > +/* Compare with cpu_set_upcall() in riscv/riscv/vm_machdep.c */ > +static inline void target_thread_set_upcall(CPURISCVState *regs, > + abi_ulong entry, abi_ulong arg, abi_ulong stack_base, > + abi_ulong stack_size) > +{ > + abi_ulong sp; > + > + sp = (abi_ulong)(stack_base + stack_size) & ~(16 - 1); ROUND_DOWN(stack_base + stack_size, 16) r~