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From: Xiangyu Hu <libhu.so@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH] FMULX should flushes operators to zero when FZ is set.
Date: Wed, 28 Jan 2015 23:42:53 +0800	[thread overview]
Message-ID: <6A6F6FD2-893C-47E6-BCE5-6AA86F578875@gmail.com> (raw)
In-Reply-To: <CAFEAcA_BvhHcvDcAZXwbsDuL65-r26otdjWy-wn_s9tftPd48w@mail.gmail.com>

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Thanks Peter. 

I have sent another patch with updated commit message.

- xiangyu

> On 28 Jan, 2015, at 10:54 pm, Peter Maydell <peter.maydell@linaro.org> wrote:
> 
> On 28 January 2015 at 14:51, Xiangyu Hu <libhu.so@gmail.com <mailto:libhu.so@gmail.com>> wrote:
>> The difference between FMULX and FMUL is that FMULX will return 2.0f when one operator is
>> FPInfinity and the other one is FPZero, whilst FMUL will return a Default NaN. Without
>> this patch, the emulation would result in inconsistency.
>> 
>> Signed-off-by: Xiangyu Hu <libhu.so@gmail.com>
>> ---
>> target-arm/helper-a64.c | 6 ++++++
>> 1 file changed, 6 insertions(+)
>> 
>> diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c
>> index 81066ca..ebd9247 100644
>> --- a/target-arm/helper-a64.c
>> +++ b/target-arm/helper-a64.c
>> @@ -135,6 +135,9 @@ float32 HELPER(vfp_mulxs)(float32 a, float32 b, void *fpstp)
>> {
>>     float_status *fpst = fpstp;
>> 
>> +    a = float32_squash_input_denormal(a, fpst);
>> +    b = float32_squash_input_denormal(b, fpst);
>> +
>>     if ((float32_is_zero(a) && float32_is_infinity(b)) ||
>>         (float32_is_infinity(a) && float32_is_zero(b))) {
>>         /* 2.0 with the sign bit set to sign(A) XOR sign(B) */
>> @@ -148,6 +151,9 @@ float64 HELPER(vfp_mulxd)(float64 a, float64 b, void *fpstp)
>> {
>>     float_status *fpst = fpstp;
>> 
>> +    a = float64_squash_input_denormal(a, fpst);
>> +    b = float64_squash_input_denormal(b, fpst);
>> +
>>     if ((float64_is_zero(a) && float64_is_infinity(b)) ||
>>         (float64_is_infinity(a) && float64_is_zero(b))) {
>>         /* 2.0 with the sign bit set to sign(A) XOR sign(B) */
> 
> I think this code change is correct but the commit message doesn't
> do a very good job of describing what the change is or why it is
> needed... (in particular the difference between FMULX and FMUL is
> completely irrelevant to the need for this fix, but it is pretty
> much the only thing the commit message talks about).
> 
> thanks
> -- PMM


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  reply	other threads:[~2015-01-28 15:43 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-28 14:51 [Qemu-devel] [PATCH] FMULX should flushes operators to zero when FZ is set Xiangyu Hu
2015-01-28 14:54 ` Peter Maydell
2015-01-28 15:42   ` Xiangyu Hu [this message]
2015-01-28 15:54 ` Alex Bennée
2015-01-28 15:57   ` Peter Maydell
2015-01-28 16:11     ` Xiangyu Hu
2015-01-28 16:12     ` Claudio Fontana
2015-01-28 16:25       ` Peter Maydell
2015-01-29 19:22     ` Peter Maydell
2015-02-03 13:44       ` Alex Bennée

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