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([2a01:e0a:f0e:9070:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-475dd02cd6dsm143039245e9.2.2025.10.27.07.10.44 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 27 Oct 2025 07:10:45 -0700 (PDT) Message-ID: <6a64b4a6-1913-4ed8-9c28-b567679f25ad@redhat.com> Date: Mon, 27 Oct 2025 15:10:43 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 08/27] hw/arm/smmuv3-accel: Add set/unset_iommu_device callback Content-Language: en-US To: Shameer Kolothum , Nicolin Chen Cc: "qemu-arm@nongnu.org" , "qemu-devel@nongnu.org" , "peter.maydell@linaro.org" , Jason Gunthorpe , "ddutile@redhat.com" , "berrange@redhat.com" , Nathan Chen , Matt Ochs , "smostafa@google.com" , "wangzhou1@hisilicon.com" , "jiangkunkun@huawei.com" , "jonathan.cameron@huawei.com" , "zhangfei.gao@linaro.org" , "zhenzhong.duan@intel.com" , "yi.l.liu@intel.com" , "shameerkolothum@gmail.com" References: <20250929133643.38961-1-skolothumtho@nvidia.com> <20250929133643.38961-9-skolothumtho@nvidia.com> <7167d287-f0d0-4bb8-8750-e38e9e31df10@redhat.com> From: Eric Auger In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 10/27/25 12:56 PM, Shameer Kolothum wrote: > Hi Eric, > > Based on further off-list discussions, this needs some clarification. > >> -----Original Message----- >> From: Nicolin Chen >> Sent: 02 October 2025 17:44 >> To: Shameer Kolothum >> Cc: eric.auger@redhat.com; qemu-arm@nongnu.org; qemu- >> devel@nongnu.org; peter.maydell@linaro.org; Jason Gunthorpe >> ; ddutile@redhat.com; berrange@redhat.com; Nathan >> Chen ; Matt Ochs ; >> smostafa@google.com; wangzhou1@hisilicon.com; >> jiangkunkun@huawei.com; jonathan.cameron@huawei.com; >> zhangfei.gao@linaro.org; zhenzhong.duan@intel.com; yi.l.liu@intel.com; >> shameerkolothum@gmail.com >> Subject: Re: [PATCH v4 08/27] hw/arm/smmuv3-accel: Add >> set/unset_iommu_device callback > [..] > >> There are a couple of things going on here: >> 1) We should not attach directly to the S2 HWPT that eventually >> will be shared across vSMMU instances. In other word, an S2 >> HWPT will not be attachable for lacking of its tie to an SMMU >> instance and not having a VMID at all. Instead, each vIOMMU >> object allocated using this S2 HWPT will hold the VMID. > The above statement is not 100% correct as per the current kernel > and QEMU implementation. At present, VFIO core allocates an s2 > HWPT when IOMMU_HWPT_ALLOC_NEST_PARENT flag is set and > attaches to it. > > In the set_iommu_device () path, we use this s2 HWPT id to create a > vIOMMU and pre-allocate bypass and abort IOMMU_DOMAIN_NESTED > HWPTs, which are ready to be attached if required. those are s1 ones (bypass and abort) , right? > > On unset_iommu_device() path, we attach back to the s2 HWPT as it > does today. OK > >> 2) A device cannot attach to a vIOMMU directly but has to attach >> through a proxy nested HWPT (IOMMU_DOMAIN_NESTED). To attach >> to an IOMMU_DOMAIN_NESTED, a vDEVICE must be allocated with a >> given vSID. > Also, it became clear that we need to relax the above restriction and allow > attaching proxy nested HWPTs without requiring a vDEVICE. This is necessary > to handle cases where the SMMUv3 operates in global bypass or abort modes, > as controlled by the GBPA register, which do not have any associated devices. > > Please see Nicolin’s kernel patch [0] that introduces this relaxation. > > I’ve updated this QEMU series accordingly. SMMUv3 GBPA based HWPT will > now be attached during both reset() and GBPA update paths. OK Thank you for the update Eric > > The commit log and documentation will also be updated to reflect above > change. > > Thanks, > Shameer > [0] https://lore.kernel.org/linux-iommu/20251024040551.1711281-1-nicolinc@nvidia.com/