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From: Richard Henderson <rth@twiddle.net>
To: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>,
	qemu-ppc@nongnu.org, david@gibson.dropbear.id.au
Cc: qemu-devel@nongnu.org, bharata@linux.vnet.ibm.com
Subject: Re: [Qemu-devel] [PATCH v2 03/11] target/ppc: support for 32-bit carry and overflow
Date: Wed, 22 Feb 2017 21:31:40 +1100	[thread overview]
Message-ID: <6ab5f39d-af42-8f03-01fe-002fdd04d51d@twiddle.net> (raw)
In-Reply-To: <1487755788-16415-4-git-send-email-nikunj@linux.vnet.ibm.com>

On 02/22/2017 08:29 PM, Nikunj A Dadhania wrote:
>  target_ulong cpu_read_xer(CPUPPCState *env)
>  {
> -    return env->xer | (env->so << XER_SO) | (env->ov << XER_OV) |
> +    target_ulong xer;
> +
> +    xer = env->xer | (env->so << XER_SO) | (env->ov << XER_OV) |
>          (env->ca << XER_CA);
> +
> +    if (is_isa300(env)) {
> +        xer |= (env->ov32 << XER_OV32) | (env->ca32 << XER_CA32);
> +    }
> +    return xer;
>  }
>
>  void cpu_write_xer(CPUPPCState *env, target_ulong xer)
> @@ -32,5 +39,13 @@ void cpu_write_xer(CPUPPCState *env, target_ulong xer)
>      env->so = (xer >> XER_SO) & 1;
>      env->ov = (xer >> XER_OV) & 1;
>      env->ca = (xer >> XER_CA) & 1;
> -    env->xer = xer & ~((1u << XER_SO) | (1u << XER_OV) | (1u << XER_CA));
> +    if (is_isa300(env)) {
> +        env->ov32 = (xer >> XER_OV32) & 1;
> +        env->ca32 = (xer >> XER_CA32) & 1;
> +        env->xer = xer & ~((1ul << XER_SO) |
> +                           (1ul << XER_OV) | (1ul << XER_CA) |
> +                           (1ul << XER_OV32) | (1ul << XER_CA32));
> +    } else {
> +        env->xer = xer & ~((1u << XER_SO) | (1u << XER_OV) | (1u << XER_CA));
> +    }
>  }

Do cpus before power9 really save all of the bits you write to it?
I.e. if you write -1 to XER, do you read -1 back?

If so, then I suppose I'll have to revise my previous advice; there's no point 
in NOT storing bit 19 in env->ov32, because we can always read it back out.


r~

  reply	other threads:[~2017-02-22 10:31 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-22  9:29 [Qemu-devel] [PATCH v2 00/11] POWER9 TCG enablements - part15 Nikunj A Dadhania
2017-02-22  9:29 ` [Qemu-devel] [PATCH v2 01/11] target/ppc: move cpu_[read, write]_xer to cpu.c Nikunj A Dadhania
2017-02-22 10:26   ` Richard Henderson
2017-02-22  9:29 ` [Qemu-devel] [PATCH v2 02/11] target/ppc: optimize gen_write_xer() Nikunj A Dadhania
2017-02-22 10:27   ` Richard Henderson
2017-02-22  9:29 ` [Qemu-devel] [PATCH v2 03/11] target/ppc: support for 32-bit carry and overflow Nikunj A Dadhania
2017-02-22 10:31   ` Richard Henderson [this message]
2017-02-22 10:55     ` Nikunj A Dadhania
2017-02-22  9:29 ` [Qemu-devel] [PATCH v2 04/11] target/ppc: update ca32 in arithmetic add Nikunj A Dadhania
2017-02-22 10:33   ` Richard Henderson
2017-02-22 10:37     ` Nikunj A Dadhania
2017-02-22  9:29 ` [Qemu-devel] [PATCH v2 05/11] target/ppc: update ca32 in arithmetic substract Nikunj A Dadhania
2017-02-22 10:36   ` Richard Henderson
2017-02-22 10:58     ` Nikunj A Dadhania
2017-02-22  9:29 ` [Qemu-devel] [PATCH v2 06/11] target/ppc: update overflow flags for add/sub Nikunj A Dadhania
2017-02-22 10:37   ` Richard Henderson
2017-02-22 11:00     ` Nikunj A Dadhania
2017-02-22  9:29 ` [Qemu-devel] [PATCH v2 07/11] target/ppc: use tcg ops for neg instruction Nikunj A Dadhania
2017-02-22 10:37   ` Richard Henderson
2017-02-22  9:29 ` [Qemu-devel] [PATCH v2 08/11] target/ppc: update ov/ov32 for nego Nikunj A Dadhania
2017-02-22 10:39   ` Richard Henderson
2017-02-22 11:03     ` Nikunj A Dadhania
2017-02-22 17:13       ` Richard Henderson
2017-02-22  9:29 ` [Qemu-devel] [PATCH v2 09/11] target/ppc: add ov32 flag for multiply low insns Nikunj A Dadhania
2017-02-22 10:40   ` Richard Henderson
2017-02-22  9:29 ` [Qemu-devel] [PATCH v2 10/11] target/ppc: add ov32 flag in divide operations Nikunj A Dadhania
2017-02-22 10:40   ` Richard Henderson
2017-02-22  9:29 ` [Qemu-devel] [PATCH v2 11/11] target/ppc: add mcrxrx instruction Nikunj A Dadhania

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