* Re: [PATCH] mem/cxl_type3: fix GPF DVSEC
2022-09-15 17:59 ` [PATCH] mem/cxl_type3: fix GPF DVSEC Tong Zhang
@ 2022-09-16 14:49 ` Jonathan Cameron via
2022-09-29 19:19 ` Laurent Vivier
1 sibling, 0 replies; 3+ messages in thread
From: Jonathan Cameron via @ 2022-09-16 14:49 UTC (permalink / raw)
To: Tong Zhang
Cc: Ben Widawsky, qemu-devel@nongnu.org, ztong0001@gmail.com,
qemu-trivial@nongnu.org
On Thu, 15 Sep 2022 17:59:04 +0000
Tong Zhang <t.zhang2@samsung.com> wrote:
> The structure is for device dvsec not port dvsec. Change type to fix
> this issue.
>
> Signed-off-by: Tong Zhang <t.zhang2@samsung.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> ---
> hw/mem/cxl_type3.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> index 3bf2869573..ada2108fac 100644
> --- a/hw/mem/cxl_type3.c
> +++ b/hw/mem/cxl_type3.c
> @@ -49,7 +49,7 @@ static void build_dvsecs(CXLType3Dev *ct3d)
> .phase2_power = 0x33, /* 0x33 miliwatts */
> };
> cxl_component_create_dvsec(cxl_cstate, CXL2_TYPE3_DEVICE,
> - GPF_DEVICE_DVSEC_LENGTH, GPF_PORT_DVSEC,
> + GPF_DEVICE_DVSEC_LENGTH, GPF_DEVICE_DVSEC,
> GPF_DEVICE_DVSEC_REVID, dvsec);
> }
>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] mem/cxl_type3: fix GPF DVSEC
2022-09-15 17:59 ` [PATCH] mem/cxl_type3: fix GPF DVSEC Tong Zhang
2022-09-16 14:49 ` Jonathan Cameron via
@ 2022-09-29 19:19 ` Laurent Vivier
1 sibling, 0 replies; 3+ messages in thread
From: Laurent Vivier @ 2022-09-29 19:19 UTC (permalink / raw)
To: Tong Zhang, Ben Widawsky, Jonathan Cameron, qemu-devel@nongnu.org
Cc: ztong0001@gmail.com, qemu-trivial@nongnu.org
Le 15/09/2022 à 19:59, Tong Zhang a écrit :
> The structure is for device dvsec not port dvsec. Change type to fix
> this issue.
>
> Signed-off-by: Tong Zhang <t.zhang2@samsung.com>
> ---
> hw/mem/cxl_type3.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> index 3bf2869573..ada2108fac 100644
> --- a/hw/mem/cxl_type3.c
> +++ b/hw/mem/cxl_type3.c
> @@ -49,7 +49,7 @@ static void build_dvsecs(CXLType3Dev *ct3d)
> .phase2_power = 0x33, /* 0x33 miliwatts */
> };
> cxl_component_create_dvsec(cxl_cstate, CXL2_TYPE3_DEVICE,
> - GPF_DEVICE_DVSEC_LENGTH, GPF_PORT_DVSEC,
> + GPF_DEVICE_DVSEC_LENGTH, GPF_DEVICE_DVSEC,
> GPF_DEVICE_DVSEC_REVID, dvsec);
> }
>
Applied to my trivial-patches branch.
Thanks,
Laurent
^ permalink raw reply [flat|nested] 3+ messages in thread