* Re: Exception return [not found] <CAP4GjT1x=9z9jwRxUg-J_nyGQKiga=xcDddWzG5a9HCkiC2Tog@mail.gmail.com> @ 2021-12-16 17:44 ` Philippe Mathieu-Daudé 2021-12-16 18:47 ` Peter Maydell 0 siblings, 1 reply; 5+ messages in thread From: Philippe Mathieu-Daudé @ 2021-12-16 17:44 UTC (permalink / raw) To: abhijeet inamdar, qemu-discuss; +Cc: qemu-arm, qemu-devel Cc'ing qemu-arm developers. On 12/16/21 18:31, abhijeet inamdar wrote: > Hi, > > I was running my .elf file on my custom machine(CM3) and was hit with > this error when debugging and had the required -d flags and single stepping. > > IN: Hal_MemFault > 0x7004e794: 4770 bx lr > > Trace 0: 0x7f4faa471100 [00000000/7004e794/0x312000c1] Hal_MemFault > R00=7004938d R01=00000000 R02=7004938c R03=ffffffff > R04=7005e410 R05=10020000 R06=e000eda0 R07=00000000 > R08=00000010 R09=1003f8e0 R10=e000ed94 R11=00000000 > R12=ffffffff R13=1003dbe0 R14=fffffff9 R15=7004e794 > XPSR=01000003 ---- T handler > Taking exception 8 [QEMU v7M exception exit] > Exception return: magic PC fffffff9 previous exception 3 > M profile return from interrupt with misaligned PC is UNPREDICTABLE on v7M > ...successful exception return > DRBAR[6]: 0xa0000000 misaligned to DRSR region size, mask = 0x3fffffff > Taking exception 3 [Prefetch Abort] > ...with CFSR.IACCVIOL > ...taking pending nonsecure exception 3 > > I even check the CFSR its 0x1 by doing p/x *(uint32_t *) 0xE000ED28 > which gives me 0x1 > > Any help appreciated. > > BR. > Abhijeet. ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: Exception return 2021-12-16 17:44 ` Exception return Philippe Mathieu-Daudé @ 2021-12-16 18:47 ` Peter Maydell 2021-12-16 20:02 ` abhijeet inamdar 0 siblings, 1 reply; 5+ messages in thread From: Peter Maydell @ 2021-12-16 18:47 UTC (permalink / raw) To: Philippe Mathieu-Daudé Cc: abhijeet inamdar, qemu-arm, qemu-devel, qemu-discuss On Thu, 16 Dec 2021 at 17:44, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote: > > Cc'ing qemu-arm developers. > > On 12/16/21 18:31, abhijeet inamdar wrote: > > Hi, > > > > I was running my .elf file on my custom machine(CM3) and was hit with > > this error when debugging and had the required -d flags and single stepping. > > > > IN: Hal_MemFault > > 0x7004e794: 4770 bx lr > > > > Trace 0: 0x7f4faa471100 [00000000/7004e794/0x312000c1] Hal_MemFault > > R00=7004938d R01=00000000 R02=7004938c R03=ffffffff > > R04=7005e410 R05=10020000 R06=e000eda0 R07=00000000 > > R08=00000010 R09=1003f8e0 R10=e000ed94 R11=00000000 > > R12=ffffffff R13=1003dbe0 R14=fffffff9 R15=7004e794 > > XPSR=01000003 ---- T handler > > Taking exception 8 [QEMU v7M exception exit] > > Exception return: magic PC fffffff9 previous exception 3 > > M profile return from interrupt with misaligned PC is UNPREDICTABLE on v7M > > ...successful exception return > > DRBAR[6]: 0xa0000000 misaligned to DRSR region size, mask = 0x3fffffff > > Taking exception 3 [Prefetch Abort] > > ...with CFSR.IACCVIOL > > ...taking pending nonsecure exception 3 The logging here tells you what happened: * we are in an exception handler * we do the bx lr to magic value which is M-profile's exception-return * ...but there's something wrong with the return address we pull off the stack, because it's not an aligned value (its least significant bit is set) * moreover, it's an address that corresponds to an MPU region that has been misprogrammed (the DRBAR value isn't right); the MPU treats such regions as not matching * and so we take an instruction access fault So you have two problems: (1) the PC value on the stack that you're trying to return to is wrong (2) you're programming the MPU wrong You need to investigate and fix both. -- PMM ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: Exception return 2021-12-16 18:47 ` Peter Maydell @ 2021-12-16 20:02 ` abhijeet inamdar 2021-12-16 20:06 ` abhijeet inamdar 0 siblings, 1 reply; 5+ messages in thread From: abhijeet inamdar @ 2021-12-16 20:02 UTC (permalink / raw) To: Peter Maydell Cc: qemu-devel, qemu-arm, Philippe Mathieu-Daudé, qemu-discuss [-- Attachment #1: Type: text/plain, Size: 2378 bytes --] I made some changes to the code in qemu : https://github.com/qemu/qemu/blob/stable-6.0/target/arm/cpu.c#L339 . I have commented out the variable vecbase and directly given the address of my vector address(not zero) or where they are located in our binary file. Is that a problem? BR. Abhijeet. On Thu, Dec 16, 2021 at 7:47 PM Peter Maydell <peter.maydell@linaro.org> wrote: > On Thu, 16 Dec 2021 at 17:44, Philippe Mathieu-Daudé <f4bug@amsat.org> > wrote: > > > > Cc'ing qemu-arm developers. > > > > On 12/16/21 18:31, abhijeet inamdar wrote: > > > Hi, > > > > > > I was running my .elf file on my custom machine(CM3) and was hit with > > > this error when debugging and had the required -d flags and single > stepping. > > > > > > IN: Hal_MemFault > > > 0x7004e794: 4770 bx lr > > > > > > Trace 0: 0x7f4faa471100 [00000000/7004e794/0x312000c1] Hal_MemFault > > > R00=7004938d R01=00000000 R02=7004938c R03=ffffffff > > > R04=7005e410 R05=10020000 R06=e000eda0 R07=00000000 > > > R08=00000010 R09=1003f8e0 R10=e000ed94 R11=00000000 > > > R12=ffffffff R13=1003dbe0 R14=fffffff9 R15=7004e794 > > > XPSR=01000003 ---- T handler > > > Taking exception 8 [QEMU v7M exception exit] > > > Exception return: magic PC fffffff9 previous exception 3 > > > M profile return from interrupt with misaligned PC is UNPREDICTABLE on > v7M > > > ...successful exception return > > > DRBAR[6]: 0xa0000000 misaligned to DRSR region size, mask = 0x3fffffff > > > Taking exception 3 [Prefetch Abort] > > > ...with CFSR.IACCVIOL > > > ...taking pending nonsecure exception 3 > > The logging here tells you what happened: > > * we are in an exception handler > * we do the bx lr to magic value which is M-profile's exception-return > * ...but there's something wrong with the return address we pull > off the stack, because it's not an aligned value (its least > significant bit is set) > * moreover, it's an address that corresponds to an MPU region > that has been misprogrammed (the DRBAR value isn't right); > the MPU treats such regions as not matching > * and so we take an instruction access fault > > So you have two problems: > (1) the PC value on the stack that you're trying to return to is wrong > (2) you're programming the MPU wrong > > You need to investigate and fix both. > > -- PMM > [-- Attachment #2: Type: text/html, Size: 3116 bytes --] ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: Exception return 2021-12-16 20:02 ` abhijeet inamdar @ 2021-12-16 20:06 ` abhijeet inamdar 2021-12-16 20:21 ` Peter Maydell 0 siblings, 1 reply; 5+ messages in thread From: abhijeet inamdar @ 2021-12-16 20:06 UTC (permalink / raw) To: Peter Maydell Cc: qemu-devel, qemu-arm, Philippe Mathieu-Daudé, qemu-discuss [-- Attachment #1: Type: text/plain, Size: 2849 bytes --] If I won't make that change it gives me immediate error as follows: Taking exception 18 [v7M INVSTATE UsageFault] ...BusFault with BFSR.STKERR ...taking pending nonsecure exception 3 qemu: fatal: Lockup: can't take terminal derived exception (original exception priority -1) BR. Abhijeet. On Thu, Dec 16, 2021 at 9:02 PM abhijeet inamdar < abhijeetinamdar3005@gmail.com> wrote: > I made some changes to the code in qemu : > https://github.com/qemu/qemu/blob/stable-6.0/target/arm/cpu.c#L339 . I > have commented out the variable vecbase and directly given the address of > my vector address(not zero) or where they are located in our binary file. > Is that a problem? > > BR. > Abhijeet. > > On Thu, Dec 16, 2021 at 7:47 PM Peter Maydell <peter.maydell@linaro.org> > wrote: > >> On Thu, 16 Dec 2021 at 17:44, Philippe Mathieu-Daudé <f4bug@amsat.org> >> wrote: >> > >> > Cc'ing qemu-arm developers. >> > >> > On 12/16/21 18:31, abhijeet inamdar wrote: >> > > Hi, >> > > >> > > I was running my .elf file on my custom machine(CM3) and was hit with >> > > this error when debugging and had the required -d flags and single >> stepping. >> > > >> > > IN: Hal_MemFault >> > > 0x7004e794: 4770 bx lr >> > > >> > > Trace 0: 0x7f4faa471100 [00000000/7004e794/0x312000c1] Hal_MemFault >> > > R00=7004938d R01=00000000 R02=7004938c R03=ffffffff >> > > R04=7005e410 R05=10020000 R06=e000eda0 R07=00000000 >> > > R08=00000010 R09=1003f8e0 R10=e000ed94 R11=00000000 >> > > R12=ffffffff R13=1003dbe0 R14=fffffff9 R15=7004e794 >> > > XPSR=01000003 ---- T handler >> > > Taking exception 8 [QEMU v7M exception exit] >> > > Exception return: magic PC fffffff9 previous exception 3 >> > > M profile return from interrupt with misaligned PC is UNPREDICTABLE >> on v7M >> > > ...successful exception return >> > > DRBAR[6]: 0xa0000000 misaligned to DRSR region size, mask = 0x3fffffff >> > > Taking exception 3 [Prefetch Abort] >> > > ...with CFSR.IACCVIOL >> > > ...taking pending nonsecure exception 3 >> >> The logging here tells you what happened: >> >> * we are in an exception handler >> * we do the bx lr to magic value which is M-profile's exception-return >> * ...but there's something wrong with the return address we pull >> off the stack, because it's not an aligned value (its least >> significant bit is set) >> * moreover, it's an address that corresponds to an MPU region >> that has been misprogrammed (the DRBAR value isn't right); >> the MPU treats such regions as not matching >> * and so we take an instruction access fault >> >> So you have two problems: >> (1) the PC value on the stack that you're trying to return to is wrong >> (2) you're programming the MPU wrong >> >> You need to investigate and fix both. >> >> -- PMM >> > [-- Attachment #2: Type: text/html, Size: 3899 bytes --] ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: Exception return 2021-12-16 20:06 ` abhijeet inamdar @ 2021-12-16 20:21 ` Peter Maydell 0 siblings, 0 replies; 5+ messages in thread From: Peter Maydell @ 2021-12-16 20:21 UTC (permalink / raw) To: abhijeet inamdar Cc: qemu-devel, qemu-arm, Philippe Mathieu-Daudé, qemu-discuss On Thu, 16 Dec 2021 at 20:07, abhijeet inamdar <abhijeetinamdar3005@gmail.com> wrote: > > If I won't make that change it gives me immediate error as follows: > > Taking exception 18 [v7M INVSTATE UsageFault] > ...BusFault with BFSR.STKERR > ...taking pending nonsecure exception 3 > qemu: fatal: Lockup: can't take terminal derived exception (original exception priority -1) We've been round this one before. I told you the right way to set the reset VTOR value if your SoC has something different from the default, and it isn't by changing that bit of code. Regardless, that doesn't seem related to the problem you're having at the moment. -- PMM ^ permalink raw reply [flat|nested] 5+ messages in thread
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2021-12-16 17:44 ` Exception return Philippe Mathieu-Daudé
2021-12-16 18:47 ` Peter Maydell
2021-12-16 20:02 ` abhijeet inamdar
2021-12-16 20:06 ` abhijeet inamdar
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